Planet FPGA

Xilinx's Series 7 Kintex and Virtex FPGA development boards sport dual FMC expansion support.

LDRA extends its tool suite to support direct integration with Altera’s Embedded Design Suite (EDS) for Nios II soft core processors.

Xilinx launches its first design platforms for accelerating system development and integration with its 28-nm 7 series field-programmable gate arrays (FPGAs).

 The 38th Annual Conference of the IEEE Industrial Electronics Society (IECON) is going to be held in Montreal, Canada on October 25-28th 2012 ! Topics of this conference are (not limited to) :

- Power electronics and energy conversion

- Renable Energy & Sustainable Development

- Power Systems

- Electronics System-on-chip & Real Time Embedded Control (I chair this one !)

- Signal and Image Processing & Computational Intelligence

- Electrical Machines & Drives

- Control Systems & Applications

- Sensors, Actuators and Systems Integration

- Mechatronics & Robotics

- Factory Automation & Industrial Informatics

 Follow this link for the official call for paper :

 http://www.iecon2012.org/file/Call_for_papers.pdf

 See you there in october !

For use in DSP-, FPGA-, and MCU-based systems, the CMX7861 analog front end combines codec, embedded signal processing, and auxiliary system support for interfacing between analog and digital systems.

2012-02-12 Did you know that you can use an RSS feed reader to read my blog?

2012-01-09 I will participate in the conference FPGA Forum in Trondheim 14-15 February and give a presentation about ASIC and FPGA design.

2011-12-06 Read about my blog in Elektroniktidningen

2011-11-30 Read about my blog in EE Times

2011-11-07 Added information on how to setup and use VirtualBox

2011-10-29 Added a new story. Designing with an Actel FPGA.

2011-10-19 Added information on how to install Linux on the LX9 MicroBoard.

2011-10-05 I will take a short brake and travel to Tuscany for 10 days.

2011-09-20 Added information on how to use the Avnet Spartan-6 LX9 MicroBoard

2011-08-21 Restarted my FPGA design from scratch blog. See part 51 and forward.

 

Starting a new project

I have just started a new FPGA design project. This time we will use the Leon3 soft processor from Gaisler and build a system around it. For that reason I have ordered a new development board from Xilinx, the Spartan-6 FPGA SP605 Evaluation Kit.

Unpacking the box

Here is what's in the box.

The board itself.

The documentation

In the box we find these two documents, all other documents are found on the USB flash drive that is included in the kit.

Here is the content of the USB flash drive.

Installing the ISE Design Suite software

The software can be installed from the DVD included in the kit or from the Xilinx software download page. For more information about downloading and installing the software from the download site see part 51.

To install the software from the DVD, insert the DVD in your computer's DVD reader. The DVD contains the following directories and files.

We will install the Linux version of the software. To start the installation double-click the xsetup icon and follow the instructions.

 Installing the license file

A software voucher is included with the SP605 evaluation kit. The voucher contains the code that is used to create a device-locked and node-locked software license for the ISE Logic Edition. To create a license goto the Xilinx Product Licensing.

Enter the 22-digit code from the voucher in the field shown here above and click Redeem Now. For more information see the document "Getting Started with the Xilinx Spartan-6 FPGA SP605 Evaluation Kit" and part 51 in this blog.

“My goal was to implement an older embedded system entirely in VHDL. I chose the NES due to its complexity and variety of subsystems. The idea is to prove that chips can be modeled in VHDL and synthesized on an FPGA to replace either single ICs in old systems or the systems themselves.”

PyroFactor: Read

Bill Wong of Electronic Design magazine talks with Aaron Behman of Xilinx about several products including their ZYNQ...

Bill Wong of Electronic Design magazine talks with Aaron Behman of Xilinx about their 4K2K reference design based on...

If you know a bit about MIDI then you know that you can create music files out of notes. There are plenty of PC software that allows doing that. This Visual Music Composer tries to get rid of PC. Project is based on Altera DE2 FPGA board and this is where whole fun happens. Since there is no PC board has to take care of human input interface where PC keyboard is used. You can’t write notes if you don’t see them. So a another part is a VGA output – you can see what you’re doing on VGA screen.

WPvideo 1.10

And of course there another hidden part – the brain “music reader and converter” which resides inside FPGA chip. Code reads whats been input by user and then converts music data in to audio signal. The interface is fairly simple. In VGA screen you can see a set of available notes and other music specific symbols and then you have music sheet where you can pick and place notes. It has lots of limitations. Seems it can’t play chords and there is no support for half tones. But its already fun to play.

     The Altera UP2 Dev Board may be a bit antiquated but it still provides an awesome learning platform for under- grad university students.
     This week's article will introduce 4 of the final projects from California State University Chico's EECE 343 course: Computer Interface Circuits. Each final project has a video of the project in action as well as the FPGA source code available for download.

PyroFactor: Read

Introduction

I have for a long time thought about using an RSS reader for subscribing to different web pages and blogs but never taken the step to do it. Now the time has come. First let's see what it is all about. Here is a short introduction from Wikipedia.

RSS (originally RDF Site Summary, often dubbed Really Simple Syndication) is a family of web feed formats used to publish frequently updated works?such as blog entries, news headlines, audio, and video?in a standardized format. An RSS document (which is called a "feed", "web feed", or "channel") includes full or summarized text, plus metadata such as publishing dates and authorship.

RSS feeds benefit publishers by letting them syndicate content automatically. A standardized XML file format allows the information to be published once and viewed by many different programs. They benefit readers who want to subscribe to timely updates from favorite websites or to aggregate feeds from many sites into one place.

RSS feeds can be read using software called an "RSS reader", "feed reader", or "aggregator", which can be web-based, desktop-based, or mobile-device-based. The user subscribes to a feed by entering into the reader the feed's URI or by clicking a feed icon in a web browser that initiates the subscription process. The RSS reader checks the user's subscribed feeds regularly for new work, downloads any updates that it finds, and provides a user interface to monitor and read the feeds. RSS allows users to avoid manually inspecting all of the websites they are interested in, and instead subscribe to websites such that all new content is pushed onto their browsers when it becomes available.

Blogdrive RSS feed

This small image tells us that Blogdrive supports RSS feeds. If we move the cursor over it the URI is displayed: svenand.blogdrive.com/index.xml

Finding an RSS reader

RSS feed readers and news aggregators let us follow news and blogs easily, comfortably and efficiently in a dedicated program, on a web site or in our email program. There are hundreds of RSS readers available and it is not easy to choose. I have decided to try NewsFire on my MacBook.


Download and install NewsFire

We will download the program from the Apple Mac App Store.





Adding an RSS feed

After starting NewsFire we click the + sign in the lower left corner and enter the URI of the blog http://svenand.blogdrive.com/index.xml. Now we have to wait a few minutes for the program to grab the feed and display the name of the blog: New Horizions. Click Add to add the RSS feed.





Reading blog entries

We can now read the latest blog entries in the RSS reader. It was that simple.

Introduction

We need a logic analyzer for our embedded design project. After looking around I found the ASIX SIGMA Logic Analyzer.

The Linux solution

ASIX provides a Linux solution using Wine. It is not the most user-friendly installation and if we can stay away from Wine it would be good. Let's see if there are other solutions. When searching the web I found sigrok.

The sigrok project

According to their webpage they support the ASIX SIGMA logic analyzer. Let's find out more.

Finding a Ubuntu/Debian package

The package can be found here: http://packages.debian.org/en/sid/sigrok

Download the sigrok package

We find a download server and download the package and open it in the Ubuntu Software Center.

Fixing dependencies

First we have to add multiarch-support..

Next we have to download libftdi1 0.19.

Install sigrok

Installing firmware

The necessary firmware files are provided by the vendor for distribution. As a result, the SIGMA works out of the box with sigrok. Trigger support has been implemented in 100 MHz and 200 MHz modes for rising/falling edges. 

First we have to install the Git package if not already installed:

--> sudo apt-get install git

The firmware files must be copied to the directory: /usr/share/sigrok/firmware

Running sigrok

The command to start sigrok is sigrok-cli:

Identify device

Use the command: sigrok-cli -D to show connected devices:

Command-line description

Here is a description of the options that can be specified on the command-line.

Find the version and display some useful information.

Building a package for Debian

We can also build a package from source files. Here is the documentation.

Fetching the source files from the GIT archive

Use this command to checkout the sigrok source files:

--> git clone git://sigrok.git.sourceforge.net/gitroot/sigrok/sigrok

Sigrok 0.2

The latest version (0.2) can be downloaded from Softpedia.

“The main goals of this project was to learn Verilog, to learn about buses and to create a platform for future projects which require the parallelism and/or exact timing of an FPGA combined with the ease of programming of a general purpose PC. An example of a future project is a programmable function generator. At the command of an application running on the PC, the FPGA can generate square waves or PWM signals to feed into a device under test.”

PyroFactor: Read

I have been watching the forums, and answering the questions I know something about as they pop up.  But, I usually find a pattern to the questions, and that then inspires me to provide a blog which addresses the issue.

Writing software to control the accelerometer

We will use Xilinx Software Development Kit (SDK) for the software development. To start a software project in SDK, the hardware design information needs to be exported from XPS to SDK. In XPS go to Project->Export Hardware Design to SDK and click Export Only.




For more information about software development see part 66.

Starting SDK

--> xsdk &

Start SDK and select a new workspace for our software project.

Starting a new project

Select New C Project from the File menu.

The first thing we have to do when starting a new project in SDK is to setup the hardware platform. We will do that by finding the XML file: LX9_AXI_ACL_system.xml and select it as the target hardware specification file.

Creating a new C-project

We call our new C project adxl345_control and start with an empty application.

We create a new board support package called adxl345_bsp_0

Adding c-program files

Because we are not the best c programmers and a bit lazy we will copy the c-files from the Avnet installation we have already downloaded. After copying the files to the src directory we have to do a refresh to see the files in SDK. 

Here is the final result ready to be compiled and built.

Before we can compile our application there are a few things we have to fix.

1. Generate a linker script
   
2. Edit the cf_adxl345_sw.c file

Generate a linker script

We will setup the linker to put all the code in the MicroBlaze BRAM.

Edit the c-program

There are two small changes to be made.

Building the project

Here is the print out from the build process. Everything looks OK.

Configure the Spartan-6 FPGA

In SDK select Xilinx Tools->Program FPGA. Select the program ELF file to be loaded to the BRAM.

Click Program.

Start the console

Start gtkterm or an other console program you prefer.

--> gtkterm &

Start program execution

From the SDK menu select Run As->Run Configuration. Select the USB port to connect to the terminal and set the baud rate to 9600. Click RUN to start the program.

After a few seconds this print out appears on the console screen.

When twisting and moving the board the values change. A great example of what we can achieve with this simple setup.

Top Previous  Next

To begin 2012, let’s recap major events/announcements that have been made in the exciting world of FPGA-based motor control during 2011:

FPGA vendors

In March, Microsemi announced its new Industrial Ecosystem for SmartFusion Intelligent Mixed Signal FPGAs. This ecosystem is intended to specifically address the following markets/applications: Power Metering and Smart Grid, Motor Control (PMSM, BLDC, Stepper), Human-Machine Interfaces, Displays and Field Devices. A week later, Microsemi announced their comprehensive product portfolio for solar power applications which includes computing devices (SmartFusion) but also analog and switching components (IGBT, diodes, etc.) - which is the logic result of the Microsemi’s acquisition of Actel during fall 2010 (on this thread read this). Unfortunately, no news on the announced SmartFusion-based motor control development kit during the year, but those who did attend APEC 2011 at Forth Worth, TX, have had the chance to have a look at Microsemi’s SmartFusion FPGA-based motor control development kit at Alizem’s booth:

On Xilinx’s side, 2011 has been an important year with the release of their new ARM-based Zynq devices and also the release of a new Xilinx Spartan6 FPGA-based motor control development kit. The big news regarding Xilinx’s Zynq for FPGA-based motor control designers is that it has integrated A2D converters, an element that’s crucial to advanced motor drives systems. Except Microsemi’s SmartFusion, no FPGA vendor had a device with integrated A2Ds and this was certainly one important point missing against conventionnal devices (DSPs & MCUs) which all have integrated A2Ds for control system applications.  According to Xilinx, this new Zynq device is going to be in production by the end of 2012 and it is positionned as a device that’s more than a processor, more than an asic and more than an fpga.

On Altera’s side, a new Motor Control development kit has been released during the summer and based on Arrow’s BeMicro low-cost form factor (145$). This platform is intended as an introductory platform for new comers in FPGA-based embedded system design which may then proceed to more advanced system design using already available Arrow’s MotionFire and EBV’s Falcon Eye Altera FPGA-based motor control development kits. Regarding devices, Altera has also made a move toward ARM-based system with their SoC FPGA and released a specific white paper for motor control using SoC FPGA. On a more educationnal side, Altera has released many publications this year intended specifically to FPGA-based motor control system designers such as 4 reasons why FPGA are right for Motor Control.

While we haven’t hear very much about Lattice in motor control / power electronics apps for a while, 2011 has been an exception with the release of a new LatticeECP3 Versa Development Kit in April. This kit is intended to be used in many computing intensive applications including Solar Panel Controllers and Data Acquisition & Control and also Video Transmission and Repeaters, Video Image Signal Processing, Camera Controllers, Network Traffic Management and Resilient Network Construction.

Motor control “apps” / subsystem IP

Over the years, this blog has published some articles explaining why the concept of “Motor Control IP/apps” - as a way to externalize/outsource motor control expertise -  is an innovative and interesting option to motor control system designers to achieve their system performance while reducing cost and time to market (read Motor Control IC vs Motor Control IP and Why FPGAs are better than DSPs for Motor Control ?). I did present a synthesis of those ideas as invited speaker at the e-Drive’s Motor, Drive & Automation System conference in San Antonio, TX, in March and the presentation has now been viewed online more than +1300 times. Those ideas are inline with the concept of “Subsystem IP” which is now perceived as a key part in “Imminent EDA Transformation“ and the ”Core of Modern Semiconductor Design“. The whole idea of an “apps-store” for embedded systems is now taking reality with the recent launch of the ARM/Avnet Embedded Software Store and also the D&R Embedded: this is probably only the beginning. Hence, ideas from only a couple years ago are definitely taking place and are changing ways to approach the difficult task of embedded system design.

What to expect in 2012?

This is always a tricky question to address but if you follow this blog regularly, you can see a momentum building toward greater adoption of FPGAs as electronic system platform for motor drive systems design and “IPs/Apps” as building blocks for motor drive system designers. Having now the major FPGA companies aligned on this market is definitely a good indicator. Regarding this blog, you may expect some change toward more content on the “IPs/Apps” side (i.e. pure motor control algorithms/software) not only oriented toward FPGA, but also toward other electronic devices on the market. More on this later in 2012…

Meanwhile, thanks for your interest and I wish you success in your power electronics system design in 2012 !

Using Pmods

Pmods are small I/O interface boards that offer an ideal way to extend the capabilities of the Spartan-6 LX9 MicroBoard. Pmods communicate with system boards using 6 and 12-pin connectors. Pmods include sensors, I/O, data acquisition & conversion, connectors, external memory, and more.

Overview

The Spartan-6 LX9 MicroBoard has two connectors which allow expansion to Pmod Peripheral modules.

For more information on Pmods see: www.em.avnet.com/adipmods.

The Pmods can be ordered from Digilent. Here are some examples:

The Digilent Pmod 3-axis accelerometer

I just received the PmodACL board which I ordered from Silica before Christmas. A late Christmas present. We will connect this module to the Spartan-6 LX9 MicroBoard and build a new embedded system to make use of all the nice possibilities this board offers.

The Digilent Pmod-ACL features an Analog Devices ADXL345 Accelerometer. The ADXL345 is a small, thin, low power, 3-axis accelerometer with high resolution (13-bit) measurement at up to ±16 g. Digital output data is formatted as 16-bit two's complement and is accessible through either a SPI (3- or 4-wire) or I2C digital interface.

The ADXL345 is well suited for mobile device applications. It measures the static acceleration of gravity in tilt-sensing applications, as well as dynamic acceleration resulting from motion or shock. Its high resolution (4 mg/LSB) enables measurement of inclination changes less than 1.0°.

The tutorial

This tutorial demonstrates how to interface an Avnet Spartan-6 LX9 MicroBoard to a Digilent PmodACL using the Xilinx EDK. It includes a custom designed peripheral core that provides a simple interface for software to access streaming acceleration data in all 3 dimensions as well as tap and free fall detection. We will follow the document: "Spartan-6 LX9 MicroBoard On-Ramp Tutorial, Utilizing Analog Device's Accelerometer Pmod AXI Version" from Avnet that can be downloaded from their support page.

The hardware platform

Here is a picture showing the system we are going to build. We will start with an existing project and make a copy of it as a starting point for our new project.

Copying an EDK project

We copy the LX9_AXI design (see part 65) to a new project called LX9_AXI_ACL. The following files are copied from the LX9_AXI project and renamed to LX9_AXI_ACL_system.mhs, LX9_AXI_ACL_system.xmp and LX9_AXI_ACL_system.ucf

We also have to copy the file etc/download.cmd used by iMPACT.

Edit the project file LX9_AXI_ACL_system.xmp and change the MHS and UCF file names.

Xilinx Platform Studio XPS

Start XPS and load the new project.

We will remove the following IPs:

• SPI_FLASH
  
• axi_pwm_0
• axi_timer
• microblaze_0_intc

Adding the ADI peripheral core

The custom AXI-based IP core is written in Verilog and is a subset of the MicroBlaze project. This core is controlled by software running on the MicroBlaze processor as well as interrupts from the accelerometer. The processor can program any of the internal accelerometer's configuration registers as well as read any of its data registers through this IP core. The IP core continuously updates position data based on interrupts received from the accelerometer.

A state machine inside cf_adxl345.v handles all of the transactions from the processor. It sits in an idle state waiting for stimulus from the processor or accelerometer. The processor can initiate reads and writes through a command register at address 0x00. Meanwhile, the state machine also responds to interrupts from the accelerometer indicating new data is available. The BW_RATE Register (0x2C) dictates the refresh rate of the accelerometer. 

The IP core is included in the file "Avnet_SP6LX9_MicroBoard_ADI_ACL_AXI_Pmod_13_2_01.zip" that can be downloaded from the Avnet support site. When unpacked it locks like this:

Adding the IP core

1. Copy the directory cf_adxl345_core_v1_00_a to our own pcores directory.
   
2. From the Project menu select <Rescan User Repositories>
3. The IP core will show up in the User section of the IP catalog

Add the IP core to our system.

Rename the IP core to ADXL345. here is the result.

Connect all ports to external pins.

Here is the final result : LX9_AXI_ACL_system.mhs

Edit the constraints file: LX9_AXI_ACL_system.ucf

The LX9 MicroBoard

Connect the Pmod board to the connector J4.

We are ready to write the software to control our accelerometer. See next part.

Top Previous  Next