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Samplify announces compression for tomography

Programmable Logic DesignLine - May 14, 2008 - 2:30pm
Samplify Systems, Schleifring und Apparatebau GmbH, and Tokyo Electron Device Ltd (TED) deliver a real-time solution for compression for computed tomography.
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Xilinx Flash-based Configuration and Storage Solution

FPGABlog.com Blog - May 14, 2008 - 9:18am

Xilinx, Inc. (Nasdaq: XLNX) announced a flash-based configuration and storage solution for the Virtex(R)-5 family. The solution includes a new 128Mb Platform Flash XL configuration and storage device, a next generation Platform Cable USB II development tool, and the Xilinx(R) Virtex(R)-5 FPGA PCIe(R) 1.x and 2.0 Embedded Processor Board. The Platform Flash XL solution delivers the industry's highest throughput and lowest device count for high-performance PCI Express(R) connectivity applications used in optical and enterprise networking, WiMAX digital front-end and baseband processing, video broadcast equipment, and medical ultrasound and scanners.

Xilinx Platform Flash XL configuration devices are available for ordering today in high volume quantities. All devices are rated for both commercial and industrial temperature ranges, and available in both standard and Pb-Free packages. Platform Cable USB II is available immediately as an upgrade to Platform Cable USB and priced at US$225. The Xilinx Virtex-5 PCIe 1.x and 2.0 Embedded Processor Development Board will be available for ordering on May 19, 2008 and priced at US$1,695.

The non-volatile Platform Flash XL offering extends the density of Xilinx configuration memory from 32Mb to 128Mb with devices that operate at 50 MHz synchronous with a wide, 16-bit parallel data bus. Platform Flash XL configuration is more than three times faster than third-party asynchronous parallel flash memory offerings. When combined with the Virtex-5 family's PCI Express Endpoint blocks, this new solution facilitates configuration before PCIe link activation in the widely-used ATX (Advanced Technology Extended) power supply-based compute systems to ensure interoperability with a broad range of applications.

With the exclusive Xilinx built-in power-up sequencing capabilities, multi-boot and fallback features, as well as comprehensive reference design support, the Platform Flash XL is the easiest to use configuration solution for Virtex-5 FPGAs. Designers can also use the solution for many non-configuration applications by using a standard CFI interface to access the Platform Flash XL's flash memory bits. This means unused memory capacity within the 128Mb device can be made available for FPGA bitstream revision updates, user data storage, or embedded processor code shadowing applications.

The Platform Cable USB II is the company's second-generation Pb-free (RoHS compliant) USB download cable for use with all Xilinx devices. It features innovative FPGA-based acceleration firmware, new protection circuitry, and enhanced signal integrity for fast, reliable, and user-friendly configuration and programming. These capabilities support the unique high performance requirements of Virtex-5 FPGA and Platform Flash XL-based designs. The Platform Cable USB II is also a cost-effective tool for debugging embedded software and firmware when used with the Xilinx embedded development kits and ChipScope(TM) Pro analyzer. The Platform Cable USB II is backwards compatible with the Xilinx Platform Cable USB and supports USB full speed (USB 1.1) and hi-speed (USB 2.0) ports.

The Xilinx Virtex-5 FPGA PCIe 1.x and 2.0 Embedded Processor Development Board is a highly flexible platform for developing and validating Virtex-5 FPGA-based embedded processing applications with high-speed serial connectivity and next-generation memory interfaces. Powered by the Xilinx Virtex-5 FX70T FPGA and 128Mb Platform Flash XL configuration and storage device, this new development board is designed to support x4 PCI Express 1.x and 2.0 specifications, DDR-3 (component), DDR-2 (SO-DIMM), data-rate-adjustable RocketIO(TM) GTP/GTX transceivers (with super clock), and single-ended and LVDS connections. The on-board super clock provides different reference clocks across eight RocketIO GTX transceivers, thereby providing an ideal development vehicle for any serial IO-based application.

More info: Platform Flash XL | Platform Cable USB II | Virtex-5 PCIe and Embedded Processor Development Board

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How to raise the RTL abstraction level and design conciseness with SystemVerilog - Part 2

Programmable Logic DesignLine - May 14, 2008 - 8:43am
Using advanced HDLs like SystemVerilog, current hardware modeling styles can be enhanced both in terms of abstraction levels and overall efficiency.
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Enhancement vs. Depletion vs. Junction FETs

Programmable Logic DesignLine - May 14, 2008 - 5:58am
Does anyone know (a) which came first and (b) what are the different types used for?
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Inrevium FPGA Imaging Application Evaluation Platform

FPGABlog.com Blog - May 13, 2008 - 9:14am

The inrevium TB-3S-1400AN-IMG / TB-3S-3400DSP-IMG, from Tokyo Electron Device Limited (TED) (TOKYO:2760), is an imaging application evaluation platform equipped with Xilinx Spartan-3 AN/A-DSP FPGA. The inrevium TB-3S-1400AN-IMG / TB-3S-3400DSP-IMG supports the development of FPGA design in any kind of products that require image processing. TED also provides turnkey solutions cooperatively with IP partners and a wide variety of optional boards, in addition to the evaluation board. The inrevium TB-3S-1400AN-IMG/TB-3S-3400DSP-IMG is available now, with a price at US$1,440 and US$1,980.

Tokyo Electron Device inrevium TB-3S-1400AN-IMG / TB-3S-3400DSP-IMG Block Diagram

IPs such as H.264 Encoder, Face Recognizer, Video Stabilizer, Dynamic Range Correction/Noise Reduction and GUI development environments for embedded devices are available. Various optional boards for a wide range of target applications including DVI, USB, CameraLink, and Analog video interfaces are also available. These enable to reduce a risk associated with the development efforts that use the latest FPGA and realize efficient functional evaluation of target applications, and enabling time-to-market.

Features

  • FPGA: Xilinx XC3S1400AN/XC3SD3400A-4FGG676C
  • LTC Power Management Solution
  • 32M x 16bit (512Mbits) DDR2 SDRAM x4
  • 8M x 8bit (64Mbits) Flash memory
  • 10/100/1000 BASE Ethernet Ports x2
  • Connector for touch panels, VGA output
  • Expansion ports for optional board x2
  • Reference design of DDR2 SDRAM frame buffer design (Verilog HDL) and graphic controller (VHDL)

More info: inrevium TB-3S-1400AN-IMG/TB-3S-3400DSP-IMG

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Tip: FFTs in LabVIEW FPGA

Programmable Logic DesignLine - May 13, 2008 - 8:00am
Here's how to use the Fast Fourier Transform (FFT) block for National Instruments' LabVIEW FPGA.
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Making design choices between DSP and FPGA

Programmable Logic DesignLine - May 13, 2008 - 7:45am
Design guidelines to choose between DSPs, FPGAs, or a combination of the two cover topics such as device cost, performance, NRE, and availability of application-specific features.
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Educational Autonomous Robotic Vehicle

Distributed Feeds - May 13, 2008 - 6:56am
The c-Link Systems Trak-Bot is a tabletop educational robotic vehicle used to explore and demonstrate autonomous vehicle motion. The robot is perfect for students and hobbyists to test motion programming or autonomous concepts that need to be demonstrated. The drive system was created to look and feel like its bigger brothers: bulldozers and military tanks. The tracks are of an Elastomer material so as not to mark or mar surfaces and gain a modicum of traction. The chassis is constructed of ABS plastic, which allows for customization and custom painting. Creation of programs for the –P robot can be handled through Cypress PSoC Express. The –C3 robot contains an Altera Cyclone-III EP3C5, a field programmable gate array (FPGA) which can be configured with a 32-bit CPU (NIOS II). The -U robot contains a 48-pin dip plug-in for add-on features and other vendor processors. The user’s imagination is the only real limitation to what the control cards can do. Optional add-ons increase the educational potential exponentially.


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Top ten products for Q1 2008

Programmable Logic DesignLine - May 13, 2008 - 6:07am
RF components dominate in the first quarter of 2008 with National Instruments' RF power meter rated as the top product.
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QuickLogic SDIO Host Controller Targets Handheld Systems

FPGABlog.com Blog - May 12, 2008 - 3:50pm

QuickLogic® Corporation (NASDAQ:QUIK) has enhanced its SDIO host controller solution with the ability to handle multiple, independent memory cards. The enhanced host controller solution is a Proven System Block (PSB) of the company's Customer Specific Standard Product (CSSP) solutions platform library, addressing the needs of handheld system designs. The first delivered implementation handles four independent cards, but the company can configure the PSB for as many card slots as a customer requires.

The base SDIO controller supports SD, SDHC, and MMC memory cards with 4-bit and 8-bit widths. The enhanced design includes multi-drive control logic and a multiplexer to connect the controller to multiple cards using a single set of I/O lines. Cards can be of any capacity to as large as the 32 Gbytes that the SD 2.0 specification allows. Mr. Heape pointed out that this would permit a four-card implementation to give a portable device up to 128 Gbytes of storage, comparable to mini hard drives but with the reliability and flexibility advantages of removable solid state memory.

Because the controller treats each card slot as an independent solid state drive, users can mix card types and capacities in the slots without restriction. The controller can work with multiple cards as described, or can work with SD-based Managed NAND devices (such as Sandisk's iNAND) and work with embedded MMC (eMMC) devices such as Samsung's MoviNAND. It senses the type and capacity of a card (or attached memory device) upon insertion (or power-up) and automatically configures its operation to match. The controller can also be modified so that one card or attached memory device can be designated as the "boot" device in a system. Software driver support for Linux, Windows CE, and Windows Mobile operating systems is available.

QuickLogic's enhanced SDIO host controller PSB is available immediately in a 4-slot configuration and can be customized for other configurations as needed. The PSB can be implemented in the programmable fabric in the PolarPro and EclipseII CSSP platforms or can augment the base SDIO controller built into the ArcticLink CSSP family to provide multi-slot operation.

More info: QuickLogic

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SerDes chipset claims lowest jitter, enables easy interface to FPGAs

Programmable Logic DesignLine - May 12, 2008 - 3:20pm
National Semiconductor claims its SerDes chipset for high-speed serial transmission -- the DS32ELX0421 serializer and DS32ELX0124 deserializer -- offers the industry's best output jitter performance.
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New IGLOO-based portable control solutions from Actel

Programmable Logic DesignLine - May 12, 2008 - 10:43am
New daughter cards from Actel enable human machine interface and miniature motor control functionality.
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Xilinx Virtex-5 SX240T FPGA and Floating Point Operator IP Core v4

FPGABlog.com Blog - May 12, 2008 - 10:29am

Xilinx, Inc. (Nasdaq: XLNX) introduced the Virtex(R)-5 SX240T FPGA device and version v4.0 of the Floating-Point Operator (FPO) IP core. The SXT240T is the latest member of the 65nm Virtex-5 SXT FPGA platform, which is optimized for high-performance digital signal processing (DSP). With up to 528 GMACs of multiply-and-accumulate performance and over 190 GFLOPS of single-precision, floating-point DSP performance, the new device offers developers of broadcast video, medical imaging, wireless communication, defense, and high-performance computing applications the world's highest performing reconfigurable DSP solution.

Customers can start designing the SXT240T into their next generation products today using the new ISE(R) Design Suite 10.1.01. Initial samples of the device will be available in the third quarter of 2008, with full production expected to begin in the fourth quarter. The Floating-Point Operator IP core V4.0 is provided at no additional cost to customers as part of the standard IP library in the Core Generator system included with ISE Design Suite 10.1.01.

The new 65nm Virtex-5 SXT240T device incorporates 1056 25bit x 18bit DSP48E slices that designers can combine to implement scalable signal processing chains using dedicated routing resources. Each DSP48E slice consumes typically 1.4mW/100MHz dynamic power enabling efficient power management without sacrificing performance. In addition, the SX240T device has over 18Mbits of block RAM to store data and coefficients, and 24 high-speed GTP serial transceivers each supporting data rates of up to 3.75Gbps. The higher DSP bandwidth combined with memory and high speed serial connectivity enables designers to use fewer devices on their printed circuit boards, thus reducing overall system costs and power consumption while meeting stringent performance requirements.

The new FPO IP core has been optimized to use the 25bit x 18bit DSP slices to perform a floating-point multiply operations with half the resources of previous versions. The SXT240T device and the FPO IP core combine to deliver over 190 GFLOPS of single-precision, floating-point DSP performance for high-performance computing, medical imaging and defense applications. This amount of DSP performance can be used to implement up to 63 percent more single-precision floating-point multiply operations or 125 percent single-precision floating-point add operations than competing devices.

DSP designs can be created for the SXT240T device using the XtremeDSP Solution Development Tools Package that includes System Generator for DSP and the AccelDSP(TM) synthesis tool. These tools provide an FPGA implementation path for DSP algorithms developed using The Mathworks popular MATLAB(R) and Simulink(R) DSP modeling environments. System Generator for DSP provides a Xilinx optimized DSP blockset, netlist generation and hardware-in-the-loop co-simulation plug-ins for the Simulink environment. The AccelDSP synthesis tool extends these capabilities to also include fixed-point conversion, design exploration and RTL generation of floating-point MATLAB algorithms.

More info: Xilinx Virtex-5 FPGAs

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TranSwitch Taurus Platform

FPGABlog.com Blog - May 12, 2008 - 10:21am

TranSwitch® Corporation (NASDAQ: TXCC) announced the Taurus Platform, which is a flexible programmable silicon platforms. The Taurus Platform is targeted for access applications. Taurus includes a targeted set of access interfaces, including GPON, Ethernet, and POTS/TDM. The company believes the TranSwitch Platform approach will create a paradigm shift in the industry by offering more flexibility and programmability than competitive architectures like FPGA and NPUs. The Taurus Platform implements most of the functions and features of the target application in software instead of a combination of hardware and software.

The product includes two RISC processors in the data plane along with a configurable buffer manager and a carrier-grade traffic manager. Control plane functions are performed by two MIPS processors. The combination of data plane processors and control plane processors along with the hardware, can be programmed for multiple applications and would allow customers not only to customize and differentiate their products but also to upgrade functions and features.

The Taurus Platform will be the basis for a series of GPON ONU solutions for SFU (single family unit), SBU (small business unit), MDU (multiple dwelling unit) and MTU (multiple tenant unit) applications with different firmware/software loads. The SFU solution is planned to be available in Q3 of this year. All the GPON product offerings will include appropriate application firmware and software to ensure that our customers' time to market is accelerated.

The Taurus Platform will also be used to create a variety of programmable Carrier Ethernet solutions for access and CLE applications. The first of these Carrier Ethernet Products based on the Taurus platform is a programmable NID (Network Interface Device). Like all Platform based products, the NID product offering will include the hardware, software and firmware as a complete solution.

Future access products from TranSwitch will all be based on similar programmable Platforms, Taurus being the first of a series planned for introduction starting Q3 of 2008. Subsequent Platforms will be targeting different market segments and provide higher performance and more flexibility.

More info: TranSwitch

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Actel Human Machine Interface, Miniature Motor Control Daughter Card

FPGABlog.com Blog - May 12, 2008 - 10:13am

Actel Corporation (Nasdaq: ACTL) announced two plug-in daughter cards developed to manage human machine interface (HMI) and miniature motor control functionality. The new HMI Daughter Card and the Motor Control Daughter Card are offered as plug-ins to Actel's popular IGLOO Icicle Kit. Combined with the company's IGLOO-based storage and display-related development boards, design examples and intellectual property (IP) cores, the company believes these new control-related solutions will increase market penetration for Actel's 5 microwatt IGLOO FPGAs in the rapidly growing portable market.

Actel Motor Control Daughter Card with the Icicle boardMotor Control Daughter Card Features

  • Portescap three phase sensored brushless DC motor
  • Portescap 4-wire bipolar miniature stepper motor
  • HEXFET motor power stage from International Rectifier
  • Operates from Icicle kit power (USB)
  • Windows-based GUI for evaluating motor performance parameters
  • Provisions for external 12 V power source for higher current motors
  • Complete design documentation and source files
  • Royalty-free design reference

Actel HMI Daughter Card with the Icicle boardHMI Daughter Card Features

  • 6 x 3 pressure activated keypad with overlay
  • Avago hi-brightness white and tri-color ChipLEDs
  • Current mode step-up LED drivers from Monolithic Power Systems
  • 20 Hz to 20 KHz tone generation with underside-mounted speaker
  • Windows-based GUI for exploring various settings
  • Operates from Icicle Kit power (USB)
  • Complete design documentation and source files
  • Royalty-free design reference

Customers can purchase the $99 Icicle Kit from Actel. The HMI and motor control daughter cards can be purchased from Avnet's Design Resource Center. Pricing for the daughter cards is $139 and $229 for the HMI and motor control solutions, respectively. The RTL design files, packaged as design examples, will also be available for free download from Actel's website.

Co-developed with partners Ishnatek, a design services company, and Avnet Memec, a division of Avnet, the new HMI and miniature motor control solutions provide a platform-based design approach, enabling designers to quickly and easily address changing requirements, implement custom algorithms, and make design changes through device reprogramming.

The HMI Daughter Card demonstrates keypad control, brightness control for white LEDs, color mixing for red, green blue (RGB) LEDs and tone generation, which is beneficial for applications like smart phones, portable gaming consoles and remote control devices. The Motor Control Daughter Card demonstrates brushless DC and stepper motor control and can support a variety of functions often found in portable medical, industrial and consumer applications, such as respirators, infusion and volumetric pumps, smart phones and security cameras.

More info: Actel | HMI Daughtercard | Motor Control Daughtercard

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FPGA Powers Arecont Vision H.264 Megapixel IP Cameras

FPGABlog.com Blog - May 12, 2008 - 9:55am

Arecont Vision's new H.264 megapixel camera line was developed with FPGA-based hardware image processing technology. The resulting proprietary H.264 encoder implemented on a single FPGA delivers 80 billion operations per second, a feat that would require 25 Pentium computers. The compression improvement (stream size reduction) with high video resolution is up to 25 times greater than conventional MJPEG compression when capturing a typical street surveillance scene. As a result, a high-quality 3 megapixel video stream at 20fps can be as low as 2 Mbps.

Arecont Vision's new H.264 megapixel cameras are available for evaluation with full-scale production of the single- and dual-sensor camera models slated for this quarter. Arecont will release quad-sensor panoramic cameras with their proprietary H.264 compression technology later in 2008.

Arecont Vision's line of H.264 megapixel IP cameras consists of four models offering 1.3, 2, 3 and 5 megapixels. The new line features Arecont Vision's proprietary implementation of H.264 compression technology to provide security professionals with the broad range of video formats and resolutions required for various applications. The new H.264 megapixel cameras support multi-streaming capabilities for the transmission of up to 8 H.264 video streams at different video formats, frame rates, and/or resolutions.

Video from Arecont's H.264 megapixel cameras can be scaled to 1920 x 1080, or 1280 x 720 resolution with a 16 x 9 aspect ratio for a true High Definition format. Up to four virtual cameras can be streamed by selecting regions of interest within the image and acquiring them independently. Resolution is fully controllable making it possible to stream full resolution or less in order to conserve bandwidth. It is also possible to stream the full field of view at a lower resolution while streaming regions of interest at full megapixel resolution.

With support for compliant Power-over-Ethernet (PoE) and auto-iris control functionality, Arecont's H.264 megapixel surveillance solutions deliver full motion progressive scan resolution along with a host of features including Ultra Forensic Zooming to zoom in on recorded video with simultaneous viewing of zoomed and full field of view images. The new cameras also support RTSP protocol for direct streaming of H.264 video into third-party software players, such as Apple's QuickTime, as well as custom TFTP protocol for streaming into Arecont Vision's own AV100 software, and other custom software applications developed using Arecont's SDK (Software Development Kit).

More info: Arecont Vision

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Sundance SMT351T FPGA Based Modular Solution

FPGABlog.com Blog - May 12, 2008 - 9:55am

Sundance announced availability of the SMT351T, its highest performing FPGA based modular solution. The SMT351T is pin compatible and functionally identical to predecessor Sundance modules stretching back more than a decade. It conforms to the Texas Instruments Module (TIM) standard and provides a fast and low risk route to adopting Virtex®-5 technology in a modular DSP-FPGA environment.

Designed to be integrated into a wide range of modular systems the SMT351T features the Virtex-5 SX95T device that includes 640 Xilinx XtremeDSP slices capable of delivering up to 352 GMACs of DSP performance. The FPGA has direct access to 2GBytes of DDR2 RAM and a configuration PROM enables the module to be used stand-alone. FPGA configuration can be made from a connected DSP module. It is supported by an array of connectors and interfaces including four RSL (Rocket to Serial Link) connectors for data transfer rates of up to 2.5GB/s, LVDS connections for high speed parallel connections, LVTTL and 3 x 20-way SLB connectors.

Mounted onto a carrier card, the SMT351T is ideal for applications such as Software Defined Radio (SDR), MIMO and very complex video and signal processing. It is available immediately from Sundance and provides maximum flexibility and field upgradability to a range of FPGA and DSP systems.

More info: Sundance

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QuickLogic enhances SDIO host controller to handle multiple cards, mixed sizes

Programmable Logic DesignLine - May 12, 2008 - 9:23am
Enhanced SDIO host controller from QuickLogic enables four or more memory cards, each with multi-gigabyte capacity, and allows users to mix and match as desired.
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Altia's human machine interface tools selected by Altera

Programmable Logic DesignLine - May 12, 2008 - 8:10am
Altia's HMI S/W, which brings advanced graphics to automotive electronics systems designers, is selected by Altera for use in the PARIS infotainment development platform.
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Green Hills Software supports Xilinx Virtex-5 FXT FPGAs

Programmable Logic DesignLine - May 12, 2008 - 7:49am
Green Hills announces software development tools and operating systems supporting Xilinx Virtex-5 FXT platform's embedded PowerPC 440 processor cores.
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