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Hackaday Prize Entry: They Make FPGAs That Small?

Distributed Feeds - 1 hour 15 min ago

There are a few development boards entered in this year’s Hackaday Prize, and most of them cover well-tread ground with their own unique spin. There are not many FPGA dev boards entered. Whether this is because programmable logic is somehow still a dark art for solder jockeys or because the commercial offerings are ‘good enough’ is a matter of contention. [antti lukats] is doing something that no FPGA manufacturer would do, and he’s very good at it. Meet DIPSY, the FPGA that fits in the same space as an 8-pin DIP.

FPGAs are usually stuffed into huge packages – an FPGA with 100 or more pins is very common. [antti] found the world’s smallest FPGA. It’s just 1.4 x 1.4mm on a wafer-scale 16-pin BGA package. The biggest problem [antti] is going to have with this project is finding a board and assembly house that will be able to help him.

The iCE40 UltraLite isn’t a complex FPGA; there are just 1280 logic cells and 7kByte of RAM in this tiny square of programmable logic. That’s still enough for a lot of interesting stuff, and putting this into a convenient package is very interesting. The BOM for this project comes out under $5, making it ideal for experiments in programmable logic and education.

A $5 FPGA is great news, and this board might even work with the recent open source toolchain for iCE40 FPGAs. That would be amazing for anyone wanting to dip their toes into the world of programmable logic.

The 2015 Hackaday Prize is sponsored by:
Categories: Planet FPGA

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FPGA Central Blogs - July 2, 2015 - 11:00pm
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Categories: Planet FPGA

Breakout board for the DAC900E a 165 MSPS @ 10 Bit DAC

Distributed Feeds - June 27, 2015 - 10:21am

This breakout board helps me to interface my FPGA with the DAC900E from Texas Instruments.
The DAC has 165 MSPS and 10 bits which is quite some speed.
The combination FPGA and DAC opens up for experiments with digital signal processing, like making a direct digital synthesizer (DDS), digital modulation and many more. The DAC is fast enough to use it in the TX part for a shortwave radio without any analog mixer required.

A detailed description can be found:
https://digibird1.wordpress.com/breakout-board-for-the-dac900e-a-165-msps-10-bit-dac/

Categories: Planet FPGA

Really, Really Retro Computer On An FPGA

Distributed Feeds - June 23, 2015 - 1:00am

[Daniel Bailey] built himself a scaled-down clone of a very early computer in an FPGA. Specifically, he wrote some VHDL code to describe the machine in question, a scaled-down clone of the Manchester Small-Scale Experimental Machine with an 8-bit processor and a whopping 8 bytes of RAM, all of which are displayed on an LED screen. Too cool.

That he can get it to do anything at all with such constraints amazes us. Watch him program it and put it through its paces in the video below the break.

The coolest thing about the original “Manchester Baby” is that it retains memory in a Williams tube, which is essentially a CRT with an electrical pickup plate covering up the screen. You know how you get a static charge on the face of an old CRT where the electron beam hit? Well, it turns out that you can read this electric field for a while, and use it as a short-term memory element.

The builders of the SSEM included a second CRT screen so that you could visualize the entire 32×32 bits of memory on a screen, like you would. Naturally, [Daniel] had to replicate this feature on his Manchester Baby clone, but with an 8×8 LED matrix. Now we want one of those for our laptop.

The VHDL is up on Github, as is a Javascript simulator of the machine. And if you’re interested, there’s an active retro-computing Google+ group where this and similar projects are bantied about. And check out some of the earliest computer music, made on a descendant of the Manchester Baby.

Thanks [Ed] for the tip.

Categories: Planet FPGA

Altera Cyclone IV FPGA Graphics controller Part 2: 160x120 resolution increase!

Distributed Feeds - June 17, 2015 - 9:44am

After managing to get my graphics controller working at a mediocre resolution of 100×75, I wanted to squeeze as much performance out of this chip as possible! Unfortunately, due to memory constraints, this meant rewriting the VGA controller to work at a different resolution. The original controller was running at a resolution of 800×600, which when divided by 8 gives us the 100×75 pixel resolution with each 100×75 macropixel consisting of 8x 800×600 pixels. I’m using power of two resolution divisions as this allows me to calculate the memory addresses through only two shifts and a multiply, as opposed to 2 shifts and 3 multiplies (along with much more logic space…). Therefore, the next logical size up will be 4x sized macropixels, meaning a total resolution of 200×150. All seemed great after I changed the memory widths and hit compile. Disaster! Turns out, my FPGA only contains 30x M9K memory blocks whereas for a resolution of 200×150 (at 8bpp), would’ve required 32x M9K blocks! I can’t help but feel a little gutted that only two M9K blocks were holding me back from the prime resolution of 200×150 pixels.

I then reattached my thinking hat and thought of other methods of squeezing out the best performance I could from this chip. If 200×150 was the next step from 100×75 for a master resolution of 800×600, why not change to a different master resolution and subdivide that? And so that is what I did. I’ve now rewritten the VGA controller to work at 640×480 though I need to test how temperamental it is in the long term. Since my master clock is 48MHz, the best I can achieve with the PLL is a pixel clock of either 25.2MHz (supposed to be 25.175MHz) or 31.5MHz. Of these two, the 25.175MHz clock is the industry standard, however since I can actually properly synthesize the 31.5MHz clock, I’ll be using this. This will give a refresh rate of either 73Hz in VGA mode of 75Hz in VESA mode.

Now that I’m running my monitor at 640×480, I can group the pixels into 4×4 macropixels (640×480/4 = 160×120) while also storing the whole framebuffer in my onboard dual port SRAM! This is pretty much the best resolution that I can achieve in my setup without the use of external RAM though even this small increase in resolution (1.6:1.33..), video playback has reduced to a sloooooow 6.6fps.

Oh yeh, it turns out I had a small error in my original block diagram file where the memory clock is meant to be the same as the shift register clock. This was causing erratic pixel errors at high write rates.Quar2
Rerouting the memory clock

P1010838
Using the same test pic of me and Kim, the quality is much better than with the previous 100×75 version.

P1010839
Nothing like a close up, still got those random cyan artifacts on our noses…

P1010840
Testing the display with my landscape test image

P1010841
…And a closeup! The macropixels being smaller really adds to increased quality.

Keep tuned for more updates!

Categories: Planet FPGA

Altera Cyclone IV Graphics Controller + STM32F0 MCU = 100x75 video!

Distributed Feeds - June 16, 2015 - 8:09pm

Well, this week so far has been very productive with regards to electronics! This is a project I’ve been wanted to do for ages just haven’t got round to doing. I’ve previously designed VGA controllers on both my CPLD and my FPGA board but I’ve not actually done anything useful other than design a bouncing box and display a few colour bars so I finally thought: why not actually try developing a full graphics controller, how hard can it be?!

The answer to that is actually “not very hard”, I managed to get it working relatively well in one evening of coding, displaying text, images and (unsynchronised) video!

While I love my STM32F0, and wouldn’t swap it for any other platform, it is limited when it comes to precision timing events (or more so, I’m limited in my assembly knowledge!) so all I’m essentially doing is outsourcing all of the precision timing events to the FPGA and shifting data to the FPGA from my STM32F0.

The FPGA side of things is essentially just a super dumb half duplex unidirectional memory interface. The FPGA expects a 24bit SPI transfer consisting of the memory address and pixel data.

Quar1
Block diagram file for the FPGA VGA Controller

Yes, I know that the block diagram method of Altera is for lazy people but I am lazy and don’t see the point in port mapping (for this application) when everything is so much easier to visualise in the block diagram format! Regardless, each section has a different use and I’ll go through what those uses are.

“SR” (Inst4, bottom left):

This is the main interface to the world! Its pretty much a 24bit SIPO shift register where it accepts 24bits in serial form and outputs 24 bits in parallel form (to the busses PDO and MADDR), along with controlling the WR input of the dual port SRAM. To ensure the system is kept stable, the incoming clock, data and latch inputs are synchronised to the the c1 clock, running at 192MHz. The reason this clock is so fast is to ensure the FPGA can capture every edge of the SPI clock/latch from the STM32F0. I’m clocking the STM32F0 SPI at 24MHz and without a drastic amount of oversampling, data from the STM32F0 to the FPGA was getting corrupted.

Upon the latch input going from high to low (falling edge), the WR pin is set low and the two outputs PDO and MADDR are both set to zero. The system then clocks in 24 bits on the rising edge of the clock input (from the STM32F0). If more than 24 bits are clocked in, like a FIFO, all the original bits will get shifted out of the top and will be lost. On the next rising edge of the latch input (low to high), the WR pin is set high, along with the shifted data being written to the two output ports, PDO (Port data output) and MADDR (Memory address). On the next rising  edge of c1, this data will be written to the dual port SRAM

PLL (Inst8, farthest left):

This block does pretty much what it says in the name, it PLLs! For those who don’t know, PLLs are effective methods of creating fractional multiples of an input square wave, such as clocks, variable duty cycle pulse waves or phase shifted square waves. The reason I’m using a PLL is to provide two system clocks. One for the VGA controller and memory interface and the other for the shift register. The two output clocks, c0 and c1 have output frequencies of 48MHz and 144MHz, respectively.

VGA Controller (Inst, top right):

This is where all the timing magic happens! This block generated the VSync, HSync, and colour output signals, along with the memory address of the current pixel. The memory address is generated from the horizontal and vertical counters. The actual timings used, give a resolution of 800×600 pixels which if you divide both by 8, gives the chosen resolution of 100×75, nifty huh! Fortunately, division by 8 is as simple as shifting down by 3 bits by using the srl keyword. The VGA controller section actually outputs a  16bit word per pixel as this is what the DACs on my FPGA board support. My controller however only has an 8bit video interface (256 colours). To essentially “upscale” from 8bit colour to 16bit colour, some of the most significant bits are assigned to the lower bits, on the red channel for example:

Red(4 downto 2) <= MemDI(2 downto 0);
Red(1 downto 0) <= MemDI(2 downto 1);

Where MemDI is the data into the controller from the memory module. This upscaling allows the controller to display full red, green and blue, as opposed to only displaying the top few bits. The controller also ensures that the colour outputs are zero during synchronisation phases (required for some monitors).

The VGA controller outputs a memory address to one side of the dual port SRAM and reads the data from the same side on the next clock edge, displaying it pixel by pixel to the screen.

Dual port SRAM memory (Inst7, bottom right):

Dual port SRAM is by far the easiest method of allowing both read and write operations at the same time giving a layer of separation between the shift register interface and the VGA controller. This drastically simplifies potential synchronisation problems that may become present when trying to read and write a single port SRAM at the same time. The problem here however comes with larger occupied space and increased complexity in manufacture. Fortunately for me, the FPGA I’m using (Altera Cyclone IV EP4CE6E22C8) features onboard memory blocks, allowing me to store the whole frame buffer for a 100×75, 8bit pixel screen on the FPGA. If more memory was available, I would be able to store the whole 800×600 pixel frame buffer but the amount of space increases dramatically with increasing screen sizes! I need 7,500 bytes to store a 100×75 8 bit frame buffer whereas I need 480,000 bytes to store a 800×600 8bit frame buffer! In the future, I might replace this for an SDRAM interface for my onboard SDRAM, allowing me to store the full frame buffer.

As the interface is so simple, I can shift data from the STM32F0 to the FPGA pretty fast. As the STM32F0 series features a variable length SPI interface, I can send a pixel over in two 11bit SPI writes (8 bits for the pixel colour and 13bits for the address). I have however made the shift register 24bits long, for systems that don’t support a variable length SPI interface, instead requiring 3x 8bit SPI writes. As it doesn’t take that long for the STM32F0 to send a pixel over, it actually allows relatively complex tasks such as video playback to be realisable at a relatively good frame rate. Reading  my proprietary video format off a bog standard SD card, through the SPI protocol on the STM32F0 gave an unsynchronised frame rate of ~17fps. By proprietary video format, I merely mean packing every pixel, one after another into a data file and streaming that off the SD card and into the graphics controller. No decoding/decompression takes place on the STM32F0.

The video conversion is done in Matlab where the scaling factors for the original video to the 100×75 pixel screen are first calculated, the video is then scaled and converted to RGB332 format (SLOW SLOW SLOWWWWWW) and finally written to the output data file. This process is unbelievably slow, most probably because Matlab isn’t really meant to be used for relatively heavy video processing. I’ve been meaning to get around to creating a C/C++ program to do my video processing needs but haven’t got round to it just yet… This same process is used for displaying images on the screen. The image is first scaled, then packed into RGB332 format and stored in a data file, to then be read on my STM32F0 and each pixel pushed into the screen buffer. One very fortunate thing however is the fact that as the screen is interfaced with a single function: WritePix(X, Y, Col), my previously written “GFXC” library can be used to write data to the screen! This allows me to do things like write text, draw circles, ellipses, squares and so on.


P1010829
Displaying a test image of mine, a colourful “landscape” image I got off google!

P1010830
That same image, up close. You can now see every macropixel.

P1010831
A picture of me and my girlfriend! It looks better from afar…

P1010832
…Then you see the close up and we look like we’ve been cross-stitched! I don’t know why there are random green artifacts chilling in the image.

P1010836
Using my GFXC library to write some text to the screen. Believe it or not, thats the smallest font…

P1010837
One of the cooler things, displaying the colour dependent mandlebrot set! Who doesn’t love good ol’ fractals.

I will at some point in the future be uploading code for this project but I wouldn’t as of yet consider it complete enough to release to the general public as there are still a few niggles that I need to iron out. Until then, keep tuned for more updates!

Oh and also, here is a quick vlog demonstrating the video playback capabilities:

Categories: Planet FPGA

Any Replacement For Altera EPCQ Devices?

Distributed Feeds - June 16, 2015 - 1:09am
I previously wrote an article “Any Replacement For Altera EPCS Devices?” in year 2006.  I hope it has helped a lot of engineers out there.  This article serves the same purpose.  I just want to raise the same awareness here especially if this is your very first time using Altera FPGAs.  You can confidently replace the expensive EPCQ devices with N25Q serial flash from Micron.  The price difference is really huge!  Look at price table below.  I don’t even need to elaborate more.  Prices are quotated from Digikey or Newarkwebsite as of today. Density Altera Part Number Price (USD$) Micron Part Number Price (USD$) 32Mb EPCQ32SI8N 11.00 N25Q032A13ESC40G 1.08 64Mb EPCQ64SI16N 18.00 N25Q064A13ESE40E 1.64 128Mb EPCQ128SI16N 30.00 N25Q128A13ESE40E 1.88 256Mb EPCQ256SI16N 50.00 N25Q256A13ESF40G 3.06
Besides the cost difference, there is a huge advantage by using N25Q128 or N25Q064.  Their packages are both SOIC-8 whereas EPCQ64 and EPCQ128 are only available in SOIC-16 packages as of today.  This could save you some board space!
I personally had tested N25Q128A13ESE40E and N25Q256A13EF840E on hardware to configure Altera FPGAs in both Active Serial x4 and Active Serial x1 modes.  It works fine.  No issue for the Quartus II software programmer to program the POF files into these N25Q devices, too.
Categories: Planet FPGA

Two New Dev Boards That Won't Make Your Wallet Hurt-So-Good

Distributed Feeds - June 13, 2015 - 1:00pm

If you’ve been keeping up with the hobbyist FPGA community, you’ll recognize the DE0 Nano as “that small form-factor FPGA” with a deep history of projects from Oldland cpu cores to synthesizable Parallax Propeller processors. After more than four years in the field though, it’s about time for a reboot.

Its successor, the DE0 Nano SoC, is a complete redesign from multiples perspectives while doing it’s best to preserve the bite-size form factor and price that made the first model so appealing. First, the dev board boasts a Cyclone V with 40,000 logical elements (up from the DE0’s 22K) and an integrated dual-core Arm Cortex A9 Processor. The PCB layout also brings us  3.3V Arduino shield compatibility via female headers, 1 Gig of external DDR3 SDRAM and gigabit ethernet support via two onboard ASICs to handle the protocol. The folks at Terasic also seem to be tipping their hats towards the “Duino-Pi” hobbyist community, given that they’ve kindly provided both Linux and Arduino images to get you started a few steps above your classic finite-state machines and everyday combinational logic.

And while the new SoC model sports a slightly larger form factor at 68.59mm x 96mm (as opposed to the original’s 49mm x 75.2mm), we’d say it’s a small price to pay in footprint for a whirlwind of new possibilities on the logic level. The board hits online shelves now at a respectable $100.

Next, as a heads-up, the aforementioned Arduino Zero finally makes it’s release on June 15. If you’ve ever considered taking the leap from an 8-bit to a 32-bit processor without having to hassle through the setup of an ARM toolchain, now might be a great time to get started.

via [the Arduino Blog]

Categories: Planet FPGA

Top Analyst Upgrades and Downgrades: AMD, Apple, Dollar General, Noble Energy, Oracle and More

Distributed Feeds - June 9, 2015 - 5:55am

Bull and BearStocks were taking another breather with a slight selling bias on Tuesday morning. As has been observed for close to four years now, the one trend that has remained in place is that investors have lined up and bought stocks literally on every single pullback. 24/7 Wall St. reviews dozens of research reports each morning of the week to find new trading and investing ideas for its readers. Some analyst calls cover stocks to buy, while others cover stocks to sell or avoid.

These are Tuesday’s top analyst upgrades, downgrades and initiations.

Advanced Micro Devices Inc. (NYSE: AMD) was started as Outperform at Northland Securities, but the $5.00 price target (versus a $2.31 close) had shares up over 2% in early trading. The consensus price target here is only $2.52, and the 52-week range is $2.14 to $4.80.

Apple Inc. (NASDAQ: AAPL) was reiterated Outperform with a $145 price target at Credit Suisse on heels of the WWDC and streaming music. Oppenheimer reiterated an Outperform rating and $155.00 price target. Bank of America Merrill Lynch reiterated it as Buy with a $145 price objective.

Dollar General Corp. (NYSE: DG) was raised to Strong Buy from Market Perform with a $90 price target (versus a $73.34 close) at Raymond James. This is $1 shy of the street’s highest target and compares to a consensus analyst target of $82.70. Dollar General was also relisted as one of our 10 stocks to own for the next decade.

Noble Energy Inc. (NYSE: NBL) was raised to Neutral from Reduce with a $48 price target (versus a $44.69 close) at Nomura. Noble’s consensus analyst target is $53.89, and it has a 52-week trading range of $41.01 to $79.63.

Oracle Corp. (NYSE: ORCL) was started as Hold at Wunderlich. The firm started many software companies (see below), mostly tied to the hot data security market.

ALSO READ: 9 Analyst Stocks Under $10 With Massive Upside

These are the additional top analyst upgrades, downgrades and initiations seen from Wall Street research calls this Tuesday:

Abercrombie & Fitch Co. (NYSE: ANF) was reiterated as Hold at Argus, noting that the retailer’s weak outlook warrants caution.

Altera Corp. (NASDAQ: ALTR) was downgraded to Market Perform from Outperform at Wells Fargo.

BHP Billiton Ltd. (NYSE: BHP) was raised to Buy from Hold at Societe Generale.

Checkpoint Software Software Technologies Ltd. (NASDAQ: CHKP) was started as Buy with a $105 price target at Wunderlich.

Diageo PLC (NYSE: DEO) was raised to Neutral from Underperform at Credit Suisse.

Eclipse Resources Corp. (NYSE: ECR) was raised to Outperform from Sector Perform with a $9 rice target (versus a $5.82 close) at RBC Capital Markets. The consensus price target is $8.47.

Fortinet Inc. (NASDAQ: FTNT) was started as Buy at Wunderlich.

ALSO READ: MannKind News and Events Shaking Out Short Sellers

Insulet Corp. (NASDAQ: PODD) was maintained as Overweight at Piper Jaffray, and the price target was raised to $36.00.

LifeLock Inc. (NYSE: LOCK) was started as Buy at Wunderlich.

Novo Nordisk A/S (NYSE: NVO) was raised to Overweight from Equal Weight at Morgan Stanley.

Palo Alto Networks Inc. (NYSE: PANW) was started as Hold with a $180 price target at Wunderlich.

Proofpoint Inc. (NASDAQ: PFPT) was started as Buy with a $75 price target at Wunderlich.

Regulus Therapeutics Inc. (NASDAQ: RGLS) was started as Buy with a price target of $16 (versus a $10.53 close) at Guggenheim.

Rio Tinto PLC (NYSE: RIO) was downgraded to Hold from Buy at Societe Generale.

Tableau Software Inc. (NYSE: DATA) was started as Buy rating with a $130 price target at Wunderlich.

Turkcell Iletisim Hizmetleri A.S. (NYSE: TKC) was downgraded to Neutral from Buy at Goldman Sachs after Turkey’s election results leave no majority party.

Urban Outfitters Inc. (NASDAQ: URBN) was reiterated as Buy with a fair value estimate of $45.00 (versus a $36.12 target) at Janney Capital Markets.

ALSO READ: Are Airlines Stocks Oversold as Analysts Abandon Them?

In case you missed Monday’s top analyst upgrades and downgrades, they included Exxon Mobil, Home Depot, Lululemon Athletica, 3M, Vodafone, Mondelez, Chevron and over a dozen more.

Categories: Planet FPGA

Hackaday Prize Entry: Very, Very Small Logic

Distributed Feeds - June 4, 2015 - 10:00pm

Despite the existence of FPGAs and CPLDs, there’s still a necessity for very small programmable logic devices. GALs, PALs, and other old tech just won’t cut it, though, and so we are left with a new generation of programmable devices that aren’t microcontrollers or CPUs. The GreenPAC from Silego fill this niche quite nicely, with the ability to implement counters, ADCs, logic glue, level shifting, and comparators in a single chip. For any homebrew electronics tinkerer, these devices have one very obvious problem: they’re really, really small. The smallest GreenPAC device has 12 pins stuffed into a 1.6 x 1.6mm QFN package. You’re not hand soldering this thing.

For [Nick Johnson]’s Hackaday Prize entry, he’s taking these small programmable logic chips and making it easy to create your own custom ICs. Basically, it’s a breakout board for GreenPAC devices that stuffs these tiny chips onto a much more reasonable DIP package.

Breakouts aren’t enough, and to program these small chips, [Nick] is also building a board based on an ARM microcontroller. With USB input, a way to generate the 7.5V used for programming, and a breadboard friendly format, this programmer will tell these tiny chips what to do.

Not many people are building stuff with PALs and GALs anymore, but there are still a lot of work that can be done with small programmable chips. There’s certainly a place for tiny programmable logic chips like this, and anything that gets them in to the hands of more people is okay in our book.

The 2015 Hackaday Prize is sponsored by:
Categories: Planet FPGA

PhD Project / Research Guidance &amp; Consulting for VLSI Design (FPGA / Embedded / Matlab / NS2), in Pune India

Distributed Feeds - June 4, 2015 - 12:40am

Know your Technical Consultant ..
* 1.5+ decades industry experience in N.America (U.S & Canada) & India, in the following areas. For more information .. About Me.

Semiconductor Design Consulting
* FPGA Design
* System-on-Chip(SoC) Design (Using FPGA & MicroController)
* FPGA Prototyping
* Emulation (ICE)

Electronics System Design Consulting
* SoC Design
* HW – SW Co-Design using Matlab – FPGA
* NS2 Modeling for network simulations

Consulting Verticals
– Data Processing (CPU Design)
– Cryptography (Encryption / Decryption)
– Memory Management sub-systems
– Communication Protocols (SPI,I2C,PCI,rs232..)
– DO-254 Avionics Design
– Digital Image Processing
– Digital Signal Processing
– Network Simulation
– Network-on-Chip
– Wireless Networks

Consulting Highlights
– Guidance from Researching the topic to Silicon Implementation on FPGA / MicroController / SoC
– Remote Guidance through Skype / 1:1 Guidance in the office
– Remote training through Skype / 1:1 Training in the office

Consulting/ Training Delivery
Offline: Pune, Maharashtra, India
Online: Skype / Webex

For more information, Please Contact Me.

Categories: Planet FPGA

Solving Rubik's Cube With An FPGA

Distributed Feeds - June 2, 2015 - 4:00pm

For their final project for ECE 5760 at Cornell, [Alex], [Sungjoon], and [Rameez] are solving Rubik’s Cubes. They’re doing it with an FPGA, with homebrew robot arms to twist and turn a rainbow cube into the correct position.

First, the mechanical portion of the build. The team are using a system of three robot arms positioned on the left, right, and back faces of the cube relative to a camera. When a cube is placed in the jaws of this robot, the NTSC camera data is fed into an FPGA, where a Nios II soft core handles the actual detection of the cube faces, the solver algorithm, and the controller to send servo commands to the robot arms.

The algorithm used for solving the cube is CFOP – solve the white cross, the white corners, the middle layer, the top face, and finally the entire cube. In practice, the robot ended up taking between 60-70 moves. This is not the most efficient algorithm; the Thistethwaite algorithm only requires 52 moves. There’s a reason for this apparent inefficiency – the Thistlethwaite algorithm requires large look-up tables.

Once the cube is scanned and the correct moves are computed, the soft core in sends commands out through the FPGA’s GPIO pins. Each cube can be solved in under three minutes after it has been scanned, but the team ran into problems with scanning accuracy. It’s a problem that can be fixed with the right lighting setup and better aberrant cubie detection, and a great final project using FPGAs.

Video demo below.

Categories: Planet FPGA

Analysts Wrangle Over Intel-Altera Merger Benefits and Value Proposition

Distributed Feeds - June 2, 2015 - 9:15am

intelinsideIntel Corp. (NASDAQ: INTC) may have a game changer on its hands with the acquisition of Altera Corp. (NASDAQ: ALTR) now finalized. The $54 per share offer is for $16.7 billion and represents a little more than 10% of Intel’s $158 billion market cap. Many firms on Wall Street have seen their analysts reiterate their Buy ratings on Intel. Still, the deal is not being universally endorsed.

BMO Capital Markets downgraded Intel to Market Perform from Outperform based on a lack of deal vision. BMO further said that it was cutting the price target all the way to $33 from $40 based on the deal. BMO simply struggles with how it will add value for Intel shareholders long term. Based on trends of Altera before the deal, the firm just does not believe Intel’s post-merger growth assumptions.

24/7 Wall St. tracked several other analyst calls Tuesday morning (some of which are outlined in more detail below):

  • Jefferies reiterated its Buy rating with a $48 price target.
  • Credit Suisse reiterated its Outperform rating and $40 price target.
  • Canaccord Genuity maintained its Buy rating and $39 price target.
  • S&P Capital IQ maintained its Buy rating.
  • Bank of America Merrill Lynch reiterated its Buy rating and $38 price objective.

ALSO READ: 5 More Semiconductor Merger Candidates After Altera

On Intel, Canaccord Genuity said that it was maintaining its Buy rating and keeping its $39 price target. The note introduction from analyst Matthew Ramsay said:

While the price tag appears steep, the acquisition does not change our overall bullish long-term fundamental thesis as we begin meetings with Intel management and PC supply chain participants at Computex in Taiwan today that should shed light on whether Windows 10 and new Skylake product launches can drive the more robust 2H/15 PC implied by Intel’s full-year guidance.

We maintain our bullish view on Intel fundamentals highlighted by sustained foundry advantages and strong secular momentum supporting 15%+ DCG and ~20% IoTG growth potential. While Mobile losses remain heavy, we believe Intel’s modem/SoC technology is gradually closing the gap in a quickly thinning herd of competitors with the business nearing transitions to SoFIA that should eliminate the need for costly subsidies beginning 2H/15 with underappreciated cost synergy potential in the combined Mobile/PC business.

Credit Suisse was also positive. Analyst John Pitzer maintained his Buy rating $40 price target. His note said:

The transaction is valued at $16.7 bb (EV of $15.5 bb) or ~28 times 2016 EV/EBITDA a ~108% premium to its peer group. INTC expects the transaction to be financed with cash/debt, to close in 6-9 months, and to be accretive in the 1st year after close – 60% of the synergies to come from Rev and 40% from OpEx. Our analysis suggests $0.06-$0.10 accretion.

ALSO READ: Could AMD Go to Zero?

Credit Suisse further said that the firm has mixed views on the acquisition, with specifics on the more critical side as follows:

(1) valuation appears rich – we estimate a buyback would be $0.25-0.40 accretive, INTC appears to be paying > 20 years of accumulated Altera operating cash flow,

(2) Intel’s expected future Revenue CAGR of ~7% for Altera appears aggressive vs. Altera’s CAGR from 2010-2015 of negative 2.7%, and dilutive to Intel DCG/IoT CAGR of ~14%/~18% respectively,

(3) manufacturing synergies are apparent but only relevant to N+ technology which is expected to only be ~10% by 2018.

ALSO READ: 5 Key Analyst Stock Picks With 50% or More Upside

What offsets the concerns at Credit Suisse are the following issues:

(1) even if only defensive (note Company says offensive) protecting DCG footprint should be a strategic imperative,

(2) SAM expansion of $11 billion in IoT is under-appreciated by investors,

(3) discrete acceleration application is at least a $1 billion total addressable market but integrated FPGA/CPU likely opens up new applications, price points, ROI especially since DCG is NOT performance saturated,

(4) Altera is a long duration asset in a stable duopoly with better than industry margins and cash flow,

(5) its world view of Semiconductor Revenue to Global GDP inflecting higher would argue a “land-grab” strategy is likely to have significant future returns.

S&P Capital IQ maintained its Buy rating:

We think Altera presents greater opportunities within the attractive Data Center arena and believe Intel will enhance Altera’s products through their existing manufacturing relationship. While Intel will need to leverage its balance sheet, we think its substantial cash position and cash flow generation provides ample financial flexibility. We like Altera’s diversified end-market exposure. Intel sees the deal, expected to close in 6 to 9 months, being accretive to EPS/FCF in the first year.

ALSO READ: 10 Stocks to Own for the Next Decade

Categories: Planet FPGA

Could AMD Go to Zero?

Distributed Feeds - June 2, 2015 - 4:10am

AMD LogoIntel Corp.’s (NASDAQ: INTC) $16.7 billion acquisition of Altera Corp. (NASDAQ: ALTR) is meant to bolster its position in data centers and the Internet of Things, both potentially very lucrative markets, and is moreover expected to provide a boost to earnings and free cash flow in the first year after closing. It also highlights in just how much better shape Intel is than rival Advanced Micro Devices Inc. (NASDAQ: AMD), which has nowhere near that kind of money to spend on acquisitions.

Like Intel, AMD has suffered from the continued decline in personal computer (PC) shipments. However, Intel’s considerably larger size gives it a pricing edge and has allowed it to weather this tough environment much better than AMD, which has been struggling to turn a profit over the past few years. In fact, its net income has not been in the black since 2011. This is reflected in its stock price, which is down more than 42% over the past year and is hovering near all-time lows at $2.14.

The company’s latest earnings report showed few signs of improvement. First-quarter revenue declined by a hefty 26% year-over-year and 17% sequentially, with the figure of $1.03 billion missing the $1.05 billion consensus estimate. The net loss for the period totaled $73 million, with the loss per share of $0.09 also below calls for a loss of $0.05. Next quarter, the company expects revenue to contract by another 3%.

ALSO READ: 4 Chip Stocks That Could Be Huge Internet of Things Winners

The company’s poor performance over the past few years has eaten into its balance sheet. Between 2011 and 2014, the company’s total cash fell from $1.765 billion to $1.040 billion. Until recently, it has managed to keep its cash reserves above $1 billion, but as of the latest quarter, these dropped by $134 million to $906 million, which can be seen as another red flag. At the same time, its debt has risen by $56 million to $2.27 billion. According to Yahoo! Finance, its total debt to equity ratio is now at an incredible 13,341.

The amount of money the company can spend on research and development is also dwindling, which is extremely problematic as R&D spend is crucial for chip makers dependent on innovation to remain competitive. Between 2011 and 2014, R&D spending fell from around $1.45 billion to $1.03 billion. For reference, Intel’s R&D spend rose from $8.35 billion to $11.53 billion over the same period.

As such, there are very few reasons to be optimistic about AMD’s prospects at the moment. Unless the company finds a way to reboot sales growth, and shore up its bottom line and balance sheet, it is very likely that the stock will face more downside.

ALSO READ: 5 More Semiconductor Merger Candidates After Altera

Categories: Planet FPGA

Intel Buys Altera For $16.7 Billion

Distributed Feeds - June 1, 2015 - 1:00pm

Intel, CPU manufacturer we all know and love, will buy Altera, makers of fine FPGAs, for $16.7 Billion.

While most of the news about this deal focuses on the future of FPGAs in the datacenter, getting Altera IP into Intel fab houses is equally interesting. Intel is the current king of putting transistors on a piece of silicon, and Intel’s ability to put a massive amount of transistors on a chip means FPGAs will become even more capable – more gates, more blocks, and more memory. The most capable Altera FPGAs are being made with a 28nm process; Intel could theoretically double the number of gates with the 14nm process used on the new Broadwell CPUs. There is most likely someone at Xilinx tearing their hair out right now, chain-smoking next to a pot of coffee.

News of this buy out comes about a week after Avago bought Broadcom in the biggest semiconductor deal ever, and a few months after NXP and Freescale merged. Cash Rules Everything Around Semiconductors, it seems.

Categories: Planet FPGA

Analyzing 5 More Semiconductor Merger Candidates After Altera

Distributed Feeds - June 1, 2015 - 9:55am

micro chipThe semiconductor arena has been abuzz with mergers and acquisitions, whether the deals come about or fall through. There have been a few big winners in this space so far, with a couple big acquisitions solidified in just the past week alone, but this leaves more room for mergers to happen in the future. Some of the companies reviewed here are not necessarily acquisition targets but potentially acquirers themselves.

Previously 24/7 Wall St. noted that it was always concerned about the reality of a merger between Intel Corp. (NASDAQ: INTC) and Altera Corp. (NASDAQ: ALTR). The reason is regulatory oversight. Intel is considered the de facto king of processors in personal computers (PCs), but so far efforts to expand elsewhere have not been blocked. That could be good news for the industry.

The concern is that, as mentioned, the Intel-Altera deal will create a ripple around the chip space. In some ways, it is fairly easy to argue that the acquisition by Intel would create a World War I reaction: if Intel mobilizes, then its rivals have to mobilize. This is why we considered the rumors about ARM Holdings PLC (NASDAQ: ARMH) and Apple Inc. (NASDAQ: AAPL) as driven by the possibility of an Altera-Intel deal. Although it would appear that Intel is reacting as, Avago Technologies Ltd. (NASDAQ: AVGO) and Broadcom Corp. (NASDAQ: BRCM) struck first with their merger.

The fact that Altera is being acquired by Intel means that there could be another buyer that wants Xilinx Inc. (NASDAQ: XLNX). There was a slight market cap differential here: Xilinx is worth $12.5 billion and Altera is currently worth just under $16 billion. Or there is another tact here, perhaps that Xilinx will look at acquiring a company. Xilinx shares were up 2% at $40.37 on Monday.

Skyworks Solutions Inc. (NASDAQ: SWKS) may be on the lookout to do a deal that would help diversify the company away from its dependence on the mobile market. On May 22, the company was started as Neutral with a price target of $108 (versus a $103.89 close) at Goldman Sachs. Skyworks was also one of the best performing stocks at the beginning of the year. Skyworks shares were up 1% at $110.40 on Monday.

Marvell Technology Group Ltd. (NASDAQ: MRVL) has been the subject of merger rumors in the past, but it has been a long time since anyone has heard any of that. Also Citigroup recently started coverage with a Sell rating for Marvell, which could get in the way with any merger aspirations. Marvell shares were up over 2% at $14.37 on Monday.

Applied Materials (NASDAQ: AMAT) and Tokyo Electron announced in late April that they have agreed to terminate their merger. In accordance with the agreement, no termination fees will be payable by either party. The merger was originally announced in September 2013.

Basically, this decision came after the U.S. Department of Justice advised the parties that the coordinated remedy proposal submitted to all regulators would not be sufficient to replace the competition lost from the merger. Based on the Justice Department’s position, Applied Materials and Tokyo Electron determined that there is no realistic prospect for the completion of the merger.

At the same time as the announcement of the merger termination, Applied Materials announced a $3 billion share repurchase program that will take place over the next three years. It would only make sense that if regulators thought Tokyo Electron would create an anti-competitive chip equipment environment, then perhaps Applied Materials is seeking a smaller acquisition. Applied Materials shares were up almost 1% at $20.30 on Monday.

ARM Holdings was the only one of the would-be chip merger designees that was down on the day. Its American depositary shares were down by 0.5% at $53.00, perhaps because its valuation is always considered to be so high.

Categories: Planet FPGA

More Monday Acquisition Madness

Distributed Feeds - June 1, 2015 - 9:00am

MergerThe market has been flooded with news of mergers and acquisitions, and it doesn’t show any sign of stopping. In the most recent example, Apollo Global Management LLC (NYSE: APO) has announced that it will acquire OM Group Inc. (NYSE: OMG).

Under the terms of the deal, OM Group will be acquired for $34 per share, which represents a premium of roughly 28% compared to Friday’s closing price of $26.54.

In a separate transaction, Platform Specialty Products Corp. (NYSE: PAH) will acquire OM’s Electronic Chemicals and Photomasks businesses, from the Apollo Funds for a total cash consideration of $365 million. Platform believes there is a synergy opportunity in excess of $20 million over the next two years. After these secondary transactions, the Apollo Funds will own OM’s Magnetic Technologies, Battery Technologies and Advanced Organics businesses.

Joseph M. Scaminace, chairman and CEO of OM Group, commented on the acquisition:

Last year, we launched a comprehensive review of strategic alternatives, resulting in our Board of Directors unanimously concluding that this acquisition of the Company is the best course of action to maximize value for OM Group stockholders.

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He continued:

Our transformation over the past several years created an attractive portfolio of differentiated businesses with a strong foundation. The transactions we are announcing today will deliver significant and immediate cash value for our stockholders. The Apollo Funds and Platform add financial resources and global operating experience to support the execution of strategies driving the growth and competitiveness of these businesses over the long term.

Earlier on Monday, 24/7 Wall St. covered the Intel Corp. (NASDAQ: INTC) acquisition of Altera Corp. (NASDAQ: ALTR). The terms of the agreement broke down to an all-cash transaction with Intel buying Altera at $54 per share. The total value of the transaction is $16.7 billion. The deal has been unanimously approved by the boards of both Intel and Altera.

In February, Intel had made moves to acquire Altera with an offering price of what was said to be $58 per share. After that offer, both companies entered into a non-disclosure agreement. At that time, Intel reviewed Altera’s non-public information and then revised its offer to $54 per share.

All the merger interest seems to have been initially rekindled by the Broadcom Corp. (NASDAQ: BRCM) acquisition by Avago Technologies Ltd. (NASDAQ: AVGO). This deal was valued at $37 billion and is considered to be one of the largest tech acquisitions.

Monday morning, Apollo shares were down 0.3% at $22.13, in a 52-week trading range of $20.02 to $28.93. The stock has a consensus analyst price target of $26.17.

Shares of OM were up nearly 28% to $33.89. The consensus price target is $36.00 and the 52-week trading range is $21.87 to $34.18.

ALSO READ: 5 Key Analyst Stock Picks With 50% or More Upside

Categories: Planet FPGA

What Intel Is Getting in the Altera Acquisition

Distributed Feeds - June 1, 2015 - 7:20am

Intel logoThe reported standstill period between Intel Corp. (NASDAQ: INTC) and Altera Corp. (NASDAQ: ALTR) has come to an end. With the end of this period came a definitive agreement between the two companies for Intel to acquire Altera. The goal is for the combined companies to enhance Altera’s products through design and manufacturing improvements based on Intel’s integrated device manufacturing model.

The terms of the agreement broke down to an all-cash transaction with Intel buying Altera at $54 per share. The total value of the transaction is $16.7 billion. The deal has been unanimously approved by the boards of both Intel and Altera.

In February, Intel had made moves to acquire Altera with an offering price of what was said to be $58 per share. After that offer, both companies entered into a non-disclosure agreement. At that time, Intel reviewed Altera’s non-public information and then revised its offer to $54 per share.

This new deal comes on the heels of the recently announced acquisition of Broadcom Corp. (NASDAQ: BRCM) by Avago Technologies Ltd. (NASDAQ: AVGO) that seemingly rekindled merger interest and speculation within the semiconductor segment. This deal was valued at $37 billion and is considered one of the largest tech acquisitions.

ALSO READ: The 6 Stocks Punishing the Dow in 2015

Prior to the end of the standstill pact, Altera shareholders were encouraged by TIG Advisors in early May to vote against board member T. Michael Nevens. TIG Advisors also said that Altera’s board may use the upcoming foundry decision as a poison pill to ward off any attempts by Intel. The firm even went as far to say that the board of directors had failed the shareholders, denying them an immediate value opportunity. It appears that TIG will get what it wants after all.

Brian Krzanich, CEO of Intel, commented on the acquisition:

With this acquisition, we will harness the power of Moore’s Law to make the next generation of solutions not just better, but able to do more. Whether to enable new growth in the network, large cloud data centers or IoT segments, our customers expect better performance at lower costs. This is the promise of Moore’s Law and it’s the innovation enabled by Intel and Altera joining forces. We look forward to working with the talented team at Altera to deliver this value to our customers and stockholders.

Early Monday, shares of Intel were down about 1% at $34.11, in a 52-week trading range of $27.12 to $37.90. The stock has a consensus analyst price target of $34.86.

Altera shares were up 6% at $51.84. The stock has a consensus analyst price target of $39.36, and a previous 52-week trading range of $30.47 to $50.10.

ALSO READ: 5 Key Analyst Stock Picks With 50% or More Upside

Categories: Planet FPGA

Why an Intel-Altera Merger Is Making Sense Again

Distributed Feeds - May 29, 2015 - 8:00am

intelinsideIn the recent past, merger discussions between Intel Corp. (NASDAQ: INTC) and Altera Corp. (NASDAQ: ALTR) did not lead to a successful deal. However, with the reported standstill pact coming to an end on June 1, there is a growing belief that a more aggressive or even hostile approach could be coming from Intel.

The recently announced acquisition of Broadcom Corp. (NASDAQ: BRCM) by Avago Technologies Ltd. (NASDAQ: AVGO) has seemingly rekindled merger interest and speculation within the semiconductor segment. This deal was valued at $37 billion and is considered one of the largest tech acquisitions.

Back in February, Intel had made moves to acquire Altera with an offering price of what was said to be $58 per share. After this offer, both companies entered into a non-disclosure agreement. At that time, Intel reviewed Altera’s non-public information and then revised its offer to $54 per share.

Both companies already work together fairly closely, according to Sunit Rikhi, vice president and general manager of Intel Custom Foundry:

Our close collaboration enables us to work together in many areas related to semiconductor manufacturing and packaging. Together, both companies are building off one another’s expertise with the primary focus on building industry-disrupting products.

ALSO READ: 4 Chip Stocks That Could Be Huge Internet of Things Winners

Just this week, Intel and Altera announced that they would be collaborating on the development of multi-die devices that leverage Intel’s world-class package and assembly capabilities and Altera’s leading-edge programmable logic technology. The collaboration is an extension of the foundry relationship between Altera and Intel, in which Intel is manufacturing some of Altera’s products.

However, Altera shareholders were encouraged by TIG Advisors in early May to vote against a board member (T. Michael Nevens) and said that Altera’s board may use the upcoming foundry decision as a poison pill to ward off any attempts by Intel. TIG even went as far to say that the board of directors had failed the shareholders, denying them an immediate value opportunity.

All this might not matter in just a few short days when the standstill pact expires. Intel already has had a good look at Altera, and whether it is willing to acquire Altera remains a mystery for now. Should Intel petition shareholders, we might see negotiations become hostile.

Ultimately, any Altera deal is likely to come down to the price. This is also assuming that there are no regulatory issues in the United States or in international jurisdictions, but that assumption likely should not be taken for granted in the current regulatory environment.

Shares of Altera were up about 4% at $48.85 on Friday morning, in a 52-week trading range of $30.47 to $49.80. The stock has a consensus analyst price target of $39.36. The company currently has a market cap of $14.7 billion.

Intel shares were up only 1.2% at $34.43. The consensus price target is $34.86, and the 52-week trading range is $26.72 to $37.90. Intel has a market cap of $164.6 billion.

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As a reminder, speculators will drive shares up, even without knowing whether any talks are likely or planned. That standstill agreement expiration sure coincides at an interesting time when you consider the Broadcom-Avago merger timing.

Categories: Planet FPGA

Avago (AVGO) and Broadcom (BRCM) ...and Intel/Altera

Distributed Feeds - May 29, 2015 - 6:11am

Two days ago the rumor hit Wall Street that chipmaker and serial acquirer AVGO had found its newest target, BRCM.  Yesterday the offer was announced:  cash and AVGO stock, in approximately 45/55 proportions, totaling $37 billion.

my thoughts

When customers in a given industry group become bigger and more powerful, the natural response among suppliers is to do the same.  This is part of what is going on here.  More than that, AVGO appears to seek out companies whose technological virtuosity far outstrips their management skills.  So it gains not only the marketing benefit of size but also the rewards of improving the profitability of firms whose main virtue has been their intellectual property.

What’s striking about this deal is that in revenue terms AVGO is more than doubling its size.  Although I have no intention of selling the AVGO shares I own, experience says that acquirers often bite off more than they can chew when they make the jump from small acquisitions to super-size ones like this.

One of AVGO’s rumored other targets had been Xilinx (XLNX), the junior partner with Altera (ALTR) in the field programmable gate array duopoly.  I had thought that ALTR would feel more favorably disposed to overtures being made by Intel (INTC), given the possibility that AVGO would buy XLNX and turn the firm into a much more aggressive competitor.  That threat is now gone.  INTC must now rely on pressure on ALTR management from its major shareholders (shareholders are, after all, legally the owners of ALTR and the employers of management) to return to the negotiating table.

As a practical matter, managements have a lot of autonomy, despite the fact that we the shareholders are, technically speaking, the bosses.  Wall Street seems to believe that ALTR is holding out for a higher price from INTC.  While that may be the rhetoric being used, I think the real issue is more basic.  Who would want to go from being the master of all he surveys as the top dog (and treated as a demigod) at a major publicly traded company to being a near-invisible division head in a conglomerate?

Categories: Planet FPGA

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