Home
World's Largest FPGA/CPLD Portal


What language do you use for FPGA design?

Verilog
37% (279 votes)
VHDL
53% (406 votes)
System Verilog
1% (9 votes)
System-C
3% (22 votes)
Multiple Languages
4% (28 votes)
Other
2% (16 votes)
Total votes: 760

Facebook  Twitter  Linkedin  Orkut  YouTube      RSS

Check out FPGA related videos

Find Us On Facebook