Xilinx and Pico Computing Announce Industry's First 15Gb/s Hybrid Memory Cube Interface
Companies deliver high performance serial memory solution for All Programmable UltraScale devices
SAN JOSE, Calif., June 23, 2014 /PRNewswire/ -- Xilinx, Inc. (NASDAQ: XLNX) and Pico Computing, Inc., both members of the Hybrid Memory Cube Consortium (HMCC), today announced the industry's first 15Gb/s Hybrid Memory Cube (HMC) interface for All Programmable UltraScale™ devices. The Xilinx® UltraScale™ devices support the full HMC bandwidth of 4 lanes, comprised of 64 transceivers running up to 15Gb/s. Pico Computing's HMC controller IP yields exceptionally high memory bandwidth and outstanding performance/watt in a small but modular and highly scalable footprint. The combined solution enables engineers to begin 15Gb/s HMC designs for applications in domains such as high performance computing, packet processing, waveform processing, and image and video processing.
Hybrid Memory Cube is a high performance memory solution that delivers unprecedented levels of bandwidth, power efficiency, and reliability. The HMCC has developed the HMC technology specification and continues to build the ecosystem to enable its widespread adoption.
"Customers can now leverage the industry's only shipping 20nm FPGAs along with a validated IP core to bring their 15Gb/s HMC designs to market today," said Tamara Schmitz, director of technical marketing for power and memory at Xilinx. "UltraScale FPGAs are the only devices currently available that can support all four HMC lanes to enable full memory bandwidth with additional transceivers for datapath and control signals."
Pico Computing's HMC controller is highly parameterized to yield truly optimized system configurations to meet customers' specific design objectives. The number of HMC links addressed, the number and width of internal ports, clock speeds, power, performance, area, and other parameters can be "dialed in" to yield precisely the performance required.
"Pico Computing's HMC controller IP, now optimized and easily implemented on Xilinx UltraScale devices, creates an extremely efficient and flexible system solution," said Jaime Cummins, CEO at Pico Computing. "This enables both the HMC and UltraScale devices to perform at their highest levels, which in turn, enables whole new classes of high-performance computing applications."
The Pico Computing HMC Controller IP is available now.
About 20 nm UltraScale Family
Xilinx UltraScale devices deliver an ASIC-class advantage with the industry's only ASIC-class programmable architecture coupled with the ASIC-strength Vivado® Design Suite and UltraFast™ Design Methodology. Based on TSMC's 20SoC process technology, UltraScale enables >2X realizable system performance and integration, and only consumes up to half the power relative to currently available solutions. These devices include next-generation interconnect, ASIC-like clocking, significant enhancements to the logic fabric, and 2nd generation, production proven 3D IC technology that eliminates system level bottlenecks and enables consistently high device utilization without performance degradation.
About Pico Computing
Pico Computing is the technology leader in high-performance computing. Our modular, highly scalable HPC and embedded systems solve the biggest of the big data computing challenges—from the edge to the data center to the desktop. Whether targeted to PCI Express-based HPC or standalone embedded applications, Pico Computing's massively-scalable architecture, built upon FPGA technologies, brings orders-of-magnitude performance gains, greatly reduced energy costs, the industry's smallest form factors, and simplified application design.