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Altera Releases New 100G Ethernet and Interlaken IP Cores To Drive High-Capacity Transmission and Backhaul Applications

Latest Cores Strengthen Company’s Best-in-Class IP Portfolio by Delivering, Highest Performance, Lowest Latency and Smallest Resource Area

San Jose, Calif., November 19, 2013– Altera Corporation (Nasdaq: ALTR) today strengthened its intellectual property (IP) portfolio with the addition of four new best-in-class IP cores to the company’s MegaCore IP library. These new best-in-class IP cores include an ultra-high performance and ultra-low latency 100G Interlaken, 100G Ethernet, 40G Ethernet and 10G Ethernet IP. The cores are optimized to deliver the highest performance, lowest latency and smallest resource utilization in the industry. Developers of data centers and networking equipment can leverage these versatile solutions to increase system bandwidth while differentiating the end system. The Interlaken and Ethernet IP cores, as well as other standard interface IPs, are currently available and fully supported in the latest release of the Quartus II software v13.1.

“By focusing on innovation, we have broken traditional barriers and tradeoffs in design by simultaneously lowering latency, increasing performance and reducing resource utilization, setting a new standard for best practices in designing high-performance IP cores,” said David Kehlet, vice president of IP design at Altera. “Moving forward, our customers will continue to see these best practices implemented as we release new and re-architected IP cores.”

All IPs included in the MegaCore IP library are validated and demonstrated in silicon.The IP cores deliver 15 percent timing margin for faster timing closure, which allow customers to quickly integrate multiple IP cores into the designs. The new Interlaken and Ethernet IP cores are optimized for use in Altera’s high-performance Stratix V FPGAs as well as future Generation 10 FPGAs and SoCs. Customers today via early access software are using these best-in-class IP cores in 20 nm Arria 10 FPGA designs. The new IP cores included in the MegaCore IP library include:

• Low-Latency 100G Interlaken IP Core– This best-in-class IP core leverages a soft PCS to deliver roundtrip latency under 200ns.
• Low-Latency 100G Ethernet IP Core – This best-in-class IP core is the smallest 100G Ethernet core at 55 percent smaller than the existing 100G Ethernet IP and has an industry-leading roundtrip latency of 160ns, making it 70 percent lower latency than competitive 100G Ethernet IP cores.
• Low-Latency 40G Ethernet IP Core– This best-in-class IP core is 40 percent smaller and 60 percent lower latency than existing 40G Ethernet IP cores.
• Low-Latency 10G Ethernet IP Core– This best-in-class IP core is 20 percent smaller and 24 percent lower latency than existing 10G Ethernet IP cores.
• For a complete list of the new and enhanced IP cores offered in the Quartus II software v13.1 release, visit the website.

Availability

Altera best-in-class IP cores are available today as part of the company’s MegaCore function IP library. Customers can access the IP library by downloading Quartus II software v13.1.

About Altera

Altera® programmable solutions enable designers of electronic systems to rapidly and cost effectively innovate, differentiate and win in their markets. Altera offers FPGAs, SoCs, CPLDs, ASICs and complementary technologies, such as power management, to provide high-value solutions to customers worldwide.

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