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TCL
Junior Electrical Engineer specializing in embedded hardware, FPGA and software design
Submitted by
muraws2
on July 31, 2010 - 8:19pm
Tags:
Altera quartus II
C++
Cadence dfII
Encounter
FPGA
MATLAB
Modelsim
Network-on-Chip
NoC
PERL
TCL
Verilog
VHDL
Virtuoso
Visual Studio
Read more
4 years of FPGA as well as high speed transceivers DFT experience at Altera - San Jose,CA
Submitted by
ramry01
on March 14, 2010 - 8:53pm
Tags:
C
C++
Design Compiler and hspice
PERL
Quartus
TCL
Tetramax
VCS
Verilog
Sr FPGA Design and Verification Engineer
Submitted by
ishwarayya
on February 11, 2010 - 8:02am
Tags:
Assembly
C
TCL
Verilog
VHDL
Read more
Sr FPGA Design and Verification Engineer
Submitted by
ishwarayya
on February 11, 2010 - 8:02am
Tags:
Assembly
C
TCL
Verilog
VHDL
Read more
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