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I'm planning on using std_logic_textio library for my testbench. I
just want access to the hread / hwrite functions. I don't like doing
non-standard things. Am I making a mistake?

Shannon

On Fri, 10 Jul 2009 08:12:27 -0700 (PDT), Shannon wrote:

>I'm planning on using std_logic_textio library for my testbench. I
>just want access to the hread / hwrite functions. I don't like doing
>non-standard things. Am I making a mistake?

No. It's all there, supported by every simulator I've ever
come across. And it's officially supported in the 2008 standard.

Allergy to non-standard is good, but std_logic_textio is as near
as it gets to a standard without the official rubber-stamp, and
even that is on the way.
--
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
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The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.

On Jul 10, 9:30*am, Jonathan Bromley <jonathan.brom...@MYCOMPANY.com>
wrote:
> On Fri, 10 Jul 2009 08:12:27 -0700 (PDT), Shannon wrote:
> >I'm planning on using std_logic_textio library for my testbench. *I
> >just want access to the hread / hwrite functions. *I don't like doing
> >non-standard things. *Am I making a mistake?
>
> And it's officially supported in the 2008 standard.

Try turning on the VHDL-2008 switch in your simulator.
If hread and hwrite work without the package reference to
std_logic_textio, then these new features has been implemented.
It works in a couple of the simulators I have tried it.

In the 2008 standard, these functions were upgraded (now handle
parameters that are not a multiple of 4 bits for hexadecimal or
3 bits for octal) and were moved to std_logic_1164. The package
std_logic_textio still exists for backward compatibility.
It has aliases to the functions in std_logic_1164 (to allow
selected name references to the package to still work).

If your simulator does not support VHDL-2008 textio yet,
use std_logic_textio, but avoid selected name references
(such as ieee.std_logic_textio.hwrite) to the subprograms in
the package. This way when you have VHDL-2008 support, your
design will work with or without the reference to
std_logic_textio.

Cheers,
Jim

SynthWorks VHDL Training
www.SynthWorks.com