FPGA Central

Hi all,

trying to get my head around mentor graphics. I have typed a bunch of code
and I am now trying to compile it. I am using Mentor Graphics. Here's what I
have been doing thus far:

Basically I go into the HDL designer window, set a root for my design and I
then click on the task manager icon which brings up a list of tasks for me
to carry out on the VHDL code. I click on 'Generate' which responds by
indicating 'Generation Completed Succesfully'. I then set the ModelSim
compile path to the following:


'D:\HDL\HDS_PROJECTS\ADAPTIVE_ENCODER_TRANSMITTER\ ADAPTIVE_ENCODER_TRANSMITT
ER_LIB\HDL'

....in that the above directory holds my vhdl files. I then click ModelSim
compile and I get the following response, which it pauses on:

Performing compile...
Library adaptive_encoder_transmitter_lib
executing
D:/HDL/HDS_PROJECTS/ADAPTIVE_ENCODER_TRANSMITTER/ADAPTIVE_ENCODER_TRANSMITTE
R_LIB/HDL/vlib
D:/HDL/hds_projects/adaptive_encoder_transmitter/adaptive_encoder_transmitte
r_lib/work

Like I mentioned...this is as far as it goes. Looking at my CPU processes,
it doesn't actually seem to be doing anything.

Any ideas? Or is there some other way to get my vhdl files to compile? I am
using HDL Designer 2003.2.

cheers

- Kingsley

jk wrote:

> trying to get my head around mentor graphics. I have typed a bunch of code
> and I am now trying to compile it. I am using Mentor Graphics. Here's what I

Consider learning modelsim first:

http://groups.google.com/groups?q=vs...t_mydesign.vhd


-- Mike Treseler