FPGA Central

Hello all,
I wanted to use fphdl package (www.eda.org/fphdl) in my Modelsim.

I compiled the folling package files :

fphdl_real_base_pkg_body
fixed_pkg
fp_sin
fphdl_base_pkg
fphdl_base_pkg_alg_body
fphdl32_pkg
fphdl16_pkg
fphdl_base_pkg_body
fphdl32_pkg_body
fixed_pkg_body
fphdl16_pkg_body

After compilation i got errors in two of the packages
(fphdl32_pkg_body and fphdl16_pkg_body).
In " fphdl32_pkg_body " i got error messeges like:
(1) .unknown identifier :fp32
(2) .function cannot return anonymous subtype
(3) .attribute range requires an array prefix
(4) .unknown identifier :floating point

In " fphdl16_pkg_body " i got error messeges like:
(1) .unknown identifier :fp16
(2) .unknown identifier :floating_point
(3) .unknown identifier :fp_absolute
(4) .unknown identifier :fp_negative


Though the fp16 error is vanished by using the ALIAS i.e.

alias fp16 is fp;

but how to remove other errors?

Am i missing something ??

Thnaks in advance

Maybe the order of compilation.

Just compile it again. (?)

Rgds
André

The order of compilation is as follows:

fixed_pkg
fixed_pkg_body
fphdl_base_pkg
fphdl_base_pkg_body
fphdl16_pkg
fphdl16_pkg_body ----does not compile
fphdl32_pkg
fphdl32_pkg_body -----does not compile
fphdl_base_pkg_alg_body

Reiterating that all packages got compiled other than :

fphdl16_pkg_body
fphdl32_pkg_body

That is body of the two packages does not compile... while their
headings/declearations part gets compiled.

A reply from Mr.David Bishop is expected :-)

Regards
ved



[email protected] wrote:
> Maybe the order of compilation.
>
> Just compile it again. (?)
>
> Rgds
> André

The problem is solved,

fphdl16_pkg already contains the body also, so no need to compile
fphdl16_pkg_body seperately.

Similarly for fphdl32_pkg.

Thnaks
ved



[email protected] wrote:
> The order of compilation is as follows:
>
> fixed_pkg
> fixed_pkg_body
> fphdl_base_pkg
> fphdl_base_pkg_body
> fphdl16_pkg
> fphdl16_pkg_body ----does not compile
> fphdl32_pkg
> fphdl32_pkg_body -----does not compile
> fphdl_base_pkg_alg_body
>
> Reiterating that all packages got compiled other than :
>
> fphdl16_pkg_body
> fphdl32_pkg_body
>
> That is body of the two packages does not compile... while their
> headings/declearations part gets compiled.
>
> A reply from Mr.David Bishop is expected :-)
>
> Regards
> ved
>
>
>
> [email protected] wrote:
> > Maybe the order of compilation.
> >
> > Just compile it again. (?)
> >
> > Rgds
> > André

I see that somebody already posted a fix, but I'll put my own spin on
it.

First, we now have documentation for the fixed and floating point packages:
http://www.eda.org/vhdl-200x/vhdl-20...s/Fixed_ug.pdf
and
http://www.eda.org/vhdl-200x/vhdl-20...s/Float_ug.pdf

Also, for VHDL-2002 and VHDL-93 I created special versions of these packages
which synthesize and simulate without using any of the VHDL-2005 tricks:
http://www.eda.org/vhdl-200x/vhdl-20...ixed_pkg_c.vhd
http://www.eda.org/vhdl-200x/vhdl-20...base_pkg_c.vhd
These are designed to be compiled into an "IEEE_PROPOSED" library.

I am in the middle of making some changes to these packages. When I am done,
the IEEE (IEEE_PROPOSED) library will have the following packages in it:

fixed_pkg
float_pkg

These packages will be instances of "fixed_generic_pkg" and "float_generic_pkg",
and will look like this (in VHDL-2005):

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use ieee.fixed_pkg.all;

package float_pkg is new ieee.float_generic_pkg
generic map (
fp_round_style => round_nearest; -- round nearest algorithm
fp_denormalize => true; -- Use IEEE extended floating
-- point (Denormalized numbers)
fp_check_error => true; -- Turn on NAN and overflow processing
fp_guard_bits => 3 -- number of guard bits
);

Where the type "float" will need to be constrained by the user. "float32",
"float64", and "float128" will be predefined. For "fp16" the user will have to say:

subtype fp16 is float (9 downto -6);

I will create VHDL-93 compatable versions of these packages, but the
"fphdl16_pkg" will not be in the next release.