FPGA Central

All,

I declared an enumerated type and created an attribute to describe the value
for each enumeration as follows:

-- These are the RAM commands
type ram_cmd_type is (
SDRAM_LOAD_MODE_REG,
SDRAM_PRECHARGE ,
SDRAM_WRITE ,
SDRAM_BURST_TERM ,
SDRAM_REFRESH ,
SDRAM_ACTIVE ,
SDRAM_READ ,
SDRAM_NOP );

-- Note: the bits are: CS WE RAS CAS, in that order
attribute ENUM_ENCODING: STRING;
attribute ENUM_ENCODING of ram_cmd_type: type is "0000 0001 0010 0011
0100 0101 0101 0111";


I'd like to assign this type to actual ports on the device.
I like using the enumeration because I can see the command type in the
simulation as opposed to using std_logic_vector(3 downto 0) or 4
std_ulogics.
Is there a way to do this so that I can still see what I want in the
simulation?

I tried using an array std_logic_vector(3 downto 0) instead of STRING, and
then initializing with ("0000", "0001", etc), but this didn't do what I
expected...

Thanks,

Adam