FPGA Central

For a test bench, verilog-xl can dump vcd, but ncverilog can not
dump.
I kind of suspect my ncverilog setting has problem. But can't figure
out.
Any guesses on this?

Pull up the docs, go to NC-Verilog Simulator Help, then read the
section on Enabling Read, Write, or Connectivity Access to Simulation
Objects. Enabling read access should be sufficient.

-cb

ncelab -access +r

Or, for more complete debug:
ncelab -access +rwc

On Dec 17, 6:32*pm, teacupfull business
<teacupfull.busin...@gmail.com> wrote:
> For a test bench, verilog-xl can dump vcd, but ncverilog can not
> dump.
> I kind of suspect my ncverilog setting has problem. But can't figure
> out.
> Any guesses on this?

On Thu, 17 Dec 2009 17:32:56 -0800, teacupfull business wrote:

> For a test bench, verilog-xl can dump vcd, but ncverilog can not dump.
> I kind of suspect my ncverilog setting has problem. But can't figure
> out.
> Any guesses on this?

Sure it can. If you have NC you want to use the .trn format which is much
more efficient then vcd, use the recordvars task for .trn

$recordfile("sys_lp","compress");
$recordvars(sys_lp);

If you need to use vcd then it uses the standard Verilog dumpvars.