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04-13-2007, 11:46 PM
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Re: SDRAM interface through FPGA. How do I ensure no mis-commands?
On Apr 10, 11:53 am, "news reader" <newsrea...@google.com> wrote:
> For example, during the refresh time, a new command arrives from the other > modules, > and causes the refresh time to be shortened, what will happen to the memory? Hi <anoynmous poster>, I'm not sure how others have done it, but in the past, I've given priority to read or write commands over that of a "request" for refresh. My refresh timer was conservative such that it wouldn't matter if a refresh was pushed back by a few cycles. Edmond 
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