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Re: UltraEdit Re: Text Editor for Verilog (also C, PERL, VHDL)

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08-18-2004, 10:04 PM

Pablo Bleyer Kocik

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Re: UltraEdit Re: Text Editor for Verilog (also C, PERL, VHDL)

What do you mean when you say it doesn't support begin/end blocks?

I am the maintainer of UltraEdit's Verilog-2001 mode. It should not
only recognize begin/end blocks but also case/endcase, fork/join,
specify/endspecify, table/endtable and config/endconfig as indentation
strings...

Regards.

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