FPGA Central

Hi,


Please register for our free webcast:



Signal Integrity Design Using Fast Channel Simulation and Eye Diagram Statistics

Date: July 29, 2009

Time: 11:00 AM - 12:00 PM PT / 2:00 PM - 3:00 PM ET

Abstract:

Improvements to traditional SPICE-type simulation have increased signal integrity channel simulation speeds to thousands of bits per minute. An overnight run can create a million-bit eye diagram and the associated metrics and statistical figures of merit. But signal integrity engineers need to repeat this determination for thousand of points in the design space in order to select the optimum combination of, for example, pre-emphasis, channel characteristics, and equalizer. Therefore, optimization using eye diagram goals requires a channel simulation technique that is orders of magnitude faster than even the fastest SPICE.



This webcast will demonstrate the "what if" design space exploration workflow that our new million-bit-per-minute channel simulator and eye diagram tool enables.



Registration info:

SI-list server mangles URLs containing the equals character, so you can either edit this one:

DELETEMEhttp://event.on24.com/r.htm?e1461&s=1&kEAAAF345F3B6FC01400112AD06ED046

....or use this SI-list-friendly shortened URL:

http://bit.ly/chansimwebcast



PS If you've enjoyed reading my blog, could you spend a few seconds giving me your vote? You don't have to be attending the Design Automation Conference to vote in Denali's "EDA Blogger of 2009" contest. Just go to:

http://www.denali.com/en/events/dac/2009/blogger.jsp

Online voting will close at 10:00PM July 27, 2009.

Thanks!

-- Colin

http://signal-integrity-tips.com <http://signal-integrity-tips.com/>


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PS: I uploaded a preview video clip here:


http://bit.ly/chansim-preview



Best regards,



-- Colin



-----Original Message-----
From: si-list-bounce (AT) freelists (DOT) org [mailto:si-list-bounce (AT) freelists (DOT) org] On Behalf Of WARWICK,COLIN (A-Americas,ex1)
Sent: Monday, July 06, 2009 11:41 AM
To: si-list (AT) freelists (DOT) org
Subject: [SI-LIST] Free webcast from Agilent EEsof EDA: Signal Integrity Design Using Fast Channel Simulation and Eye Diagram Statistics



Hi,





Please register for our free webcast:







Signal Integrity Design Using Fast Channel Simulation and Eye Diagram Statistics



Date: July 29, 2009



Time: 11:00 AM - 12:00 PM PT / 2:00 PM - 3:00 PM ET



Abstract:



Improvements to traditional SPICE-type simulation have increased signal integrity channel simulation speeds to thousands of bits per minute. An overnight run can create a million-bit eye diagram and the associated metrics and statistical figures of merit. But signal integrity engineers need to repeat this determination for thousand of points in the design space in order to select the optimum combination of, for example, pre-emphasis, channel characteristics, and equalizer. Therefore, optimization using eye diagram goals requires a channel simulation technique that is orders of magnitude faster than even the fastest SPICE.







This webcast will demonstrate the "what if" design space exploration workflow that our new million-bit-per-minute channel simulator and eye diagram tool enables.







Registration info:





http://bit.ly/chansimwebcast








------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request (AT) freelists (DOT) org with 'unsubscribe' in the Subject field

or to administer your membership from a web page, go to:
http://www.freelists.org/webpage/si-list

For help:
si-list-request (AT) freelists (DOT) org with 'help' in the Subject field


List technical documents are available at:
http://www.si-list.net

List archives are viewable at:
http://www.freelists.org/archives/si-list
or at our remote archives:
http://groups.yahoo.com/group/si-list/messages
Old (prior to June 6, 2001) list archives are viewable at:
http://www.qsl.net/wb6tpu