FPGA Central

Please join us for our annual IBIS Summit at DAC on July 28!

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AGENDA, IBIS SUMMIT MEETING
July 28, 2009

The Westin San Francisco Market Street Hotel
50 Third Street
San Francisco, California 94103

Room: Franciscan I (2nd Floor)
(check signs at site)

Admission: FREE
(registration details below)

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Please note that durations below include time for questions from
the audience.

8:00 AM Refreshments & Sign In

8:30 AM Introductions
- Welcome to Summit
- Introductions
- Opens for Issues, Discussion Topics

8:45 AM Chair's Annual Status Report
Michael Mirmak, Intel Corporation

9:00 AM Top 10 Issues as Seen During IBIS Model Reviews
Lynne Green, Green Streak Programs

9:30 AM IBIS Quality Review
Mike LaBonte, Cisco Systems

10:00 AM BREAK

10:15 AM Case Study: Analyze the Different Results from IBIS
Simulators
Lance Wang, IO Methodology

10:45 AM SI/PI Co-simulations for I/O Interfaces
Vishram Pandit and Myoung Joon Choi, Intel Corporation

11:30 AM Election of Officers

12:00 PM LUNCH

1:00 PM Serial Link / IBIS-AMI Terminology Overview
Todd Westerhoff, Signal Integrity Software (SiSoft)

1:30 PM Touchstone to Touchstone 2.0, Touchstone 2.0 to
Touchstone too
Bob Ross, Teraspeed Consulting Group

2:00 PM Model Connectivity Protocols for Chip/Package/Board
Brad Brim and Raymond Chen, Sigrity

2:30 PM BREAK

2:45 PM IBIS Interconnect SPICE Subcircuits IBIS-ISS
Walter Katz, Signal Integrity Software (SiSoft)

3:15 PM Opens/Discussion on Miscellaneous Topics or Ad Hoc
Presentations

4:55 PM Concluding Items
- Next Meeting - August 7, 2009
- Next Summits in Asia

5:00 PM End of IBIS Summit Meeting

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REGISTRATION

People involved in IBIS Model development, EDA tool development,
and digital circuit design are invited to participate to the
Summit meeting. If you plan to participate, please register with
the information below:

Name:
E-mail address:
Company:
Telephone:
Please send registrations to huqs (AT) cisco (DOT) com.

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