Third International Workshop on High-Performance
Reconfigurable Computing Technology and Applications
(HPRCTA'09)
Held in conjunction with SC09
Nov. 15, 2008, Portland, Oregon
High-Performance Reconfigurable Computing (HPRC) based on the combination of
conventional
microprocessors and field-programmable gate arrays (
FPGA) is a rapidly
evolving computing
paradigm that offers a potential to accelerate computationally intensive
scientific applications
beyond of what is possible on today's mainstream HPC systems. The academic
community has
been actively investigating this technology for the past decade and the
technology has proven
itself to be practical for a number of HPC applications. Workshop on
High-Performance
Reconfigurable Computing Technology and Applications will bring together
domain scientists and
technology developers from industry and academia to present and discuss new
research on the
use of field-programmable gate array technologies for high performance
reconfigurable
computing. The workshop is co-organized by the National Center for
Supercomputing
Applications at the University of Illinois at Urbana-Champaign, the George
Washington University,
and OpenFPGA.
Submissions are solicited on a wide range of topics related to the field of
High-performance
reconfigurable computing, including but not limited to:
.. Architecture of high-performance reconfigurable computing devices and
systems
.. Languages, compilation techniques, and tools for high-performance
reconfigurable
computing
.. Libraries and run-time environments for high-performance reconfigurable
computing
.. Performance modeling/prediction and benchmarks for high-performance
reconfigurable
computing
.. Algorithms, methodology, and best practices in application development for
HPRC
.. Applications of high-performance reconfigurable computing in science and
engineering
.. Trends and the latest developments in the field of high-performance
reconfigurable
computing
.. Standards and approaches for application portability across reconfigurable
platforms
.. Validation and verification strategies for systems employing
reconfigurable technologies
Submissions are due September 1st, 2009. Authors should submit PDF documents
electronically
to the following email address: kindr (AT) ncsa (DOT) uiuc.edu. Full-length papers up
to 10 pages are
solicited. Detailed manuscript preparation instructions are available on the
workshop's website at
http://www.ncsa.uiuc.edu/Conferences/HPRCTA09/. All papers selected for this
workshop will be
peer-reviewed. Workshop proceedings will be published in the ACM Digital
Library. The authors
of accepted papers are expected to present their work in one of the
workshop's technical
sessions.
OpenFPGA Award for Advancement in Industry Standards in Reconfigurable
Computing
will be presented to recognize a paper that exemplifies and advances efforts
to develop portable
applications on reconfigurable computing systems. The award will include a
modest cash award
and two years of OpenFPGA membership for up to eight co-authors.
General Workshop Co-Chairs: Volodymyr Kindratenko, NCSA; Tarek El-Ghazawi,
GWU
Technical Program Chair: Volodymyr Kindratenko, NCSA
OpenFPGA Award Chair: Eric Stahlberg, OpenFPGA
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