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Technical Paper Newsletter 4-8-2009 Tech Paper Library Home  NEW FEATURED TECHNICAL PAPERS The PSP Model in RF CMOS Design
Fujitsu Microelectronics
This white paper explains the technology behind PSP models and why their accuracy depends to some extent on how PDK developers implement the models. Additionally this paper shows how statistical evaluations can further help designers deal with the inherent variability of deep-submicron fabrication technologies.
Coordinated Circuit Protection Helps Manufacturers Meet Requirements of GR-1089-CORE, Issue 4
Tyco Electronics
This paper is intended to help designers and manufacturers understand the new Issue 4 of GR-1089 CORE requirements and the associated protection requirements. The protection design approach will depend on whether or not the type of primary protector is known, or can be specified.
Fundamentals of Signal Integrity
Tektronix
Signal integrity measurements are a critical step in the process of developing digital systems. Design engineers are tasked with isolating and eliminating these problems in the system, and that requires a powerful and complete measurement tool set. Read this white paper to learn how design engineers can overcome even the toughest signal integrity challenges.
Power-Aware FPGA Design
Hichem Belhadj et al • Actel
The goal of this paper is to examine each design step and component of system power with the purpose of providing techniques to reduce wasteful power consumption. In addition, available power modes and exploited to minimize further power consumption, energy, and battery life.
Introducing the Xilinx Targeted Design Platform: Fulfilling the Programmable Imperative
Tim Erjavec • Xilinx
For two-and-a-half decades, Xilinx has been at the forefront of the programmable logic revolution, with the invention and continued migration of FPGA platform technology. During that time, the role of the FPGA has evolved from a vehicle for prototyping and glue-logic to a highly flexible alternative to ASICs and ASSPS for a host of applications and markets.
The Need for a JTAG Connection and How to Make It Work
Lyle Pittroff • Mentor Graphics
This paper explains the issues and concepts that require a JTAG connection and how it provides much needed visibility and control of a modern processor core-based system.
Intel Industrial Control Reference Design
Intel
To meet the need to simplify system development and get to market faster, the Intel industrial control reference design facilitates the migration to a flexible modular architecture. It's based on an easy-touse platform, comprising hardware and software components from industrial market leaders.
An Evolution of Gate and Via Parasitic Resistance Extraction
Jarrod Stykes • Cypress Semiconductor
Cypress has recently modified the parasitic resistance extraction of Vias and Gates. Rather than use a hard number for pex via reduction count for Via grouping, Cypress has found that using flexible pex via reduction resistance for all layers and allowing user specified application of the "standard count" modifier provides nodal reduction and the ability to increase accuracy if needed.
A Flexible Solution for Industrial Ethernet
Altera
This white paper describes the use of field programmable gate array (FPGA) devices to deliver a multi-standard Industrial Ethernet capability from a single printed circuit board (PCB) implementation.
Migrating Legacy RTOS Device Drivers to Embedded Linux
Bill Weinberg • MontaVista Software
This White Paper examines the particulars of legacy RTOS device interfaces and provides heuristics, resources and concrete examples of migrating this critical code to modern Linux-based embedded platforms.
Automotive Optocouplers—Beyond Meeting the Electrical Performance at High Temperature
Leong Yik Loong et al • Avago Technologies
The trend of electric or hybrid electric vehicles has accelerated the introduction of electronic components into cars. The components residing under the hood will experience high ambient temperatures in excess of +105°C.
MSP430 Ultra-Low-Power Microcontrollers
Texas Instruments
A 16-bit RISC CPU, peripherals and flexible clock system are combined by using a von-Neumann common memory address bus (MAB) and memory data bus (MDB). Partnering an optimized CPU with modular memory-mapped analog and digital peripherals, the MSP430 device offers solutions for today's and tomorrow's mixed-signal applications.
Raising the RTL Abstraction Level and Design Conciseness with SystemVerilog
Sachin Kakkar et al • Mentor Graphics
This paper will focus on the impact of new extensions and constructs in SystemVerilog on hardware designs and describe the usefulness and compatibility of these constructs vis-à-vis pure Verilog constructs.
Advanced Dynamic Power Reduction Techniques: Operand Isolation, Operand Pre-computation, and Multi-VDD
Kajin Shi and Neel Desai • Synopsys
In this new white paper we will describe, in detail, three power-management methods that address dynamic sources of power consumption: operand isolation, operand pre-computation and multiple supply voltage (Multi-VDD).
 HIDDEN GEMS Wind River High-Assurance Solutions for Aerospace and Defense
Wind River

Calibre Rule Code Testability: The Good The Bad and The Ugly
Ronald Kalim and Cory Davis • Cypress Semiconductor

Phase-Locked Loops Demystified
John G. Maneatis and Eskinder Hailu • True Circuits

36V Dual 1.4A Monolithic Step-Down Converter has Start-Up Tracking and Sequencing
Keith Szolusha • Linear Technology

Crest Factor Reduction for OFDM-Based Wireless Systems
Altera

 WHAT'S HOT Wireless triangulation using RSSI signals
Michael Harney

Advanced Motor Control Algorithms for Reducing Power Consumption of Embedded Systems
Christian Fritz • National Instruments

Solving FM Antenna Design Challenges in Portable Devices
Natalian Zhai • Silicon Laboratories

High-Definition Surveillance Systems Using Low Cost FPGAs
Suhel Dhanani • Altera

Ways to Use USB in Embedded Systems
Yingbo Hu and Ralph Moore • Micro Digital


Fundamentals of PCB Manufacturing
Mark Laing • Mentor Graphics

Isolated Supply Overview and Design Trade-Offs
David Baba • National Semiconductor

Simplifying BLDC Commutation and Feedback System
Teng and Kong Leong • Avago Technologies

Power Integrity Effects of High Density
Happy Holden and Patrick Carrier • Mentor Graphics

Introduction to Secure Processing
CPU Tech

Designing with Thermocouples
Jason Seitz • National Semiconductor

Amplifier and Data Converter Guide
Texas Instruments

Oscilloscope Display Quality Impacts Ability to View Subtle Signal Details
Agilent Technologies

50 V RF LDMOS: An Ideal RF Power Technology for ISM, Broadcast and Radar Applications
Pierre Piel et al • Freescale Semiconductor

Power Management in an Embedded Multiprocessor Cluster
Matthias Knoth • MIPS Technologies

Automotive Isolation Amplifier for Voltage Sensing
Kenji Yamamoto and Andy Poh • Avago Technologies

JTAG Advanced Capabilities and System Design
David Morrill • National Semiconductor

Switched Ethernet Latency Analysis
GE Fanuc

Xilinx Virtex-5 (UMC 65nm Process) FPGA (XC5VLX50)
Semiconductor Insights

Next Generation Secure Mobile Devices
David Kleidermacher • Green Hills Software

Embedded Design Techniques for Developing Cost-Effective Communications
Tektronix

Mitigation Methods for Parasitic Turn-On Effect Due to Miller Capacitor
Avago

ARM Fast Models—Virtual Platforms for Embedded Software Development
Nizar Romdan • ARM

HDI Layer Stackups for Large Dense PCBs
Mentor Graphics

Passing the Test
Happy Holden • Mentor Graphics

Embedded Design Techniques for Selecting Components and Sub-systems
Tektronix

IPv6 for Embedded Devices
Tammy Leino • Mentor Graphics

LED Drivers Catalog
Texas Instruments

FPGA Synthesis: Looking Beyond the Obvious
Ehab Mohsen • Mentor Graphics

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