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Old 11-25-2009, 05:06 AM
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Default November 2009 - Xilinx EasyPath-6 FPGAs Deliver Cost Reduction for Virtex-6FPGAs in Just Six Weeks

November 2009   

  Xilinx EasyPath-6 FPGAs Deliver Cost Reduction for Virtex-6 FPGAs in Just Six Weeks
Xilinx® this month announced EasyPath™-6 FPGAs, offering the industry's lowest total cost with the lowest-risk from high-performance FPGA to production ready devices in just six weeks, the fastest turnaround time of any FPGA cost reduction solution. The new version of EasyPath FPGAs also does not require minimum order quantities, enabling customers to tailor their shipments to their end-market needs, and delivers a 35 percent cost reduction over the FPGA price at equivalent volume. To learn more, visit... Read the full press release.



  Xilinx Simplifies Serial Digital Interface Development for High Performance Professional Broadcast Audio and Video Systems
Xilinx Virtex-6 Family and Targeted Design Platforms Both Recognized as Leading Technologies in 2009 EDN China Innovation Awards
Xilinx Targeted Design Platforms Named 'Best New Concept' in EEPW 2009 Embedded Technology Award Program
Xilinx Improves Transceiver Simulation Time 100x With Release of Industry's First IBIS-AMI FPGA Transceiver Models

Virtex FPGAs
New Service for Xilinx Design Tools and IP Customer Provides Proactive “DESIGN ADVISORIES”
To best keep up to date with technical issues and related answer records for the design tools and IP you use, please update your Xilinx® user profile and choose the option to enable “DESIGN ADVISORIES ALERTS.” Once you do this, Xilinx will keep you abreast of any reported issues and how to address them specifically for the tools and IP you have licensed. To register for the service, please sign up here.
FMC Debug Mezzanine Card
The FMC Debug mezzanine card is designed to provide access to many of the pins on the FMC connector found on Xilinx® FMC-supported boards, including the SP601, SP605 and ML605. The FMC Debug mezzanine card provides a number of multi-position headers and connectors that break out FPGA interface signals to and from the board interface. A serial IIC bus re-programmable LVDS clock source and a pair of SMA connectors provide differential clock sources to the FMC-supported board FGPA. A 2 Kb serial IIC EEPROM provides non-volatile storage. Get yours today!
Xilinx Sponsors FPGA User Community on TechBites
We encourage you to visit and join for free the newly launched TechBites engineering community and specifically the site’s FPGA Community, which Xilinx® sponsors. TechBites provides a unique mix of editorial perspective, technical content, and social networking for system architects, algorithm developers, hardware designers, and software developers. TechBites.com features multiple communities, including FPGA Design, DSP, Video and Imaging, Automotive, and Analog and Mixed-Signal, to name but a few. “TechBites.com is a great place to connect with industry experts, collaborate with your peers, share your expertise, and even post your own blogs, articles, reviews, and tech-tips,” said TechBite.com’s FPGA Community leader, Max Maxfield. “It would be great if you’d bounce over and visit my FPGA Community (it’s free).”
Watch the New eLab™ Videocast Series on Managing Power in Xilinx FPGAs
Texas Instruments along with Avnet Electronics Marketing and Xilinx® present a brand new video series that showcases innovative solutions focusing best practices for power design with the Xilinx Spartan®-6 and Virtex®-6 FPGA evaluation boards. Videos include Meeting the Power Requirements for Xilinx Spartan-6 and Virtex-6 Families; Xilinx Power Estimator (XPE) Demonstration; Xilinx Development Platforms and the TI Power Solutions; and TI Fusion GUI Demonstration for configuring power supplies.
Training Course: Designing with the Spartan-6 and Virtex-6 Families
Are you interested in learning how to effectively use Spartan®-6 or Virtex®-6 FPGA architectural resources? This course targets both experienced and less experienced FPGA designers who have already completed the Essentials of FPGA Design course. This course, Designing with the Spartan-6 and Virtex-6 Families, focuses on understanding as well as how to properly design for the primary resources found in these popular device families. Learn more about the course and sign up today!
Spartan FPGAs
Video: Spartan-6 LXT FPGAs make PCI Express Easy with Compliance Verified Solutions
The Spartan-6® FPGA is the only low-cost FPGA on the market today with built-in support for PCI Express® technology. In this video, you will see the hardware and software Xilinx used to achieve compliance at recent PCI-SIG compliance workshops. Watch it today!
Accelerate Your Designs Right Out of the Box with the Spartan®-6 FPGA SP605 Evaluation Kit
The Spartan®-6 FPGA SP605 Evaluation Kit is an ideal entry-level development environment for evaluating the Spartan-6 family and is ideal for power-sensitive applications that require transceivers. Use this board if you are developing consumer, infotainment, video, and other cost- and power sensitive applications. The new kit is part of the Base Targeted Design Platform, which provides an integration of hardware, software, IP, and pre-verified reference designs so development can begin right out of the box. Get yours today!
Design Tools
Additional Industry Standard Protocol Support in Xilinx GT Wizards
The LogiCORE™ IP Spartan®-6 GTP, Virtex®-6 GTX and GTH Transceiver Wizards automate the task of creating an HDL wrapper to configure the high-speed serial GT transceivers. Their respective menu-driven interfaces add more pre-defined templates for popular industry standards so you can create your own custom protocol starting from a pre-defined template or from scratch. The Spartan-6 GTP Transceiver Wizard support CPRI™, DisplayPort, Gigabit Ethernet, HD-SDI, OBSAI, PCI Express® (PCIe®) generation 1, Serial RapidIO, XAUI, Aurora 8B/10B and SATA-I. The Virtex-6 GTH Transceiver Wizard support 10-Gigabit Ethernet, 10G Base-R, and OTN OTU2. The Virtex-6 GTX Transceiver Wizards support Aurora (8B/10B and 64B/66B), CPRI™, Gigabit Ethernet, Interlaken, OBSAI, PCI Express (PCIe) generation I and II, Serial RapidIO, XAUI and RXAUI. Visit the Architecture Wizards page to learn more.
ISE Design Suite 11.3 Update is Now Available
Version 11.3 of the ISE® Design Suite includes a host of improvements and new features. Keeping your installation up to date is the easiest way to ensure optimal design results. To update your existing ISE Design Suite installation to the latest version, visit the Xilinx® Product Update Site. New installations require the ISE Design Suite 11.1, available at the Xilinx Product Download and Licensing Site, before installing ISE Design Suite 11.3.
Start your Virtex-6 HXT FPGA Design Today with ISE Design Suite 11.3
This latest release of the ISE® Design Suite provides support for the new Virtex®-6 HXT FPGA, delivering the industry's highest bandwidth FPGA with up to 72 serial transceivers for high-bandwidth applications such as bridging, switching, and aggregation in wired telecommunications and data communications systems. Learn more and download a free 30-day evaluation of ISE Design Suite 11.3.
ISE Design Suite: DSP Edition 11.3 Extends Designer Productivity
ISE® Design Suite: DSP Edition 11.3 includes extended device support for the Virtex®-6 HXT, Virtex-6 speed grade -1L (low power), and Virtex-5Q FPGA families. It includes new OS support for Microsoft Windows Vista and 64-bit Red Hat and SUSE Enterprise Linux. It also has JTAG hardware co-simulation for the Spartan®-6 FPGA SP605 Development Platform, System Generator for DSP blockset enhancements and enhancements to DSP LogiCORE™ IP. Learn more and download a free 30-day evaluation of the ISE Design Suite: DSP Edition.
ISE Design Suite: Embedded Edition Extends Support for Virtex-6 and Spartan-6 FPGA Families
In addition to improvements in the logic design tools in all ISE® Design Suite Editions, the ISE Design Suite: Embedded Edition includes several enhancements. Now it supports Platform Flash XL for command line users and contract-based IP licensing. XPS in the tool suite now supports Clock Generator for both the Virtex®-6 and Spartan®-6 FPGA families. The suite also extends Clock Wizard support for the Multi-port Memory Controller (MPMC) in both the Virtex-6 and Spartan-6 FPGA families. Learn more and download a free 30-day evaluation of the ISE Design Suite: Embedded Edition.
New White Paper: Capabilities to Maximize Productivity for FPGA Debug and Verification
Whether your task is to verify the functional correctness of a design, ensure adequate timing performance, or quickly bring up a hardware platform in the lab environment, efficient verification and debug typically requires evaluating the design from multiple perspectives. To effectively complete these tasks, you need a complete and well integrated set of capabilities. Learn more in this technical paper about the spectrum of verification and debug tools that the ISE® Design Suite puts at your disposal. Visit...
Audio, Video & Broadcast
Xilinx Announces New Virtex-6 FPGA Broadcast Connectivity Kit
Based on the industry’s first broadcast-specific targeted design platform, the kit simplifies serial digital interface development for high performance professional broadcast audio and video systems. Click here to learn more about the kit!
Consumer
Visit Xilinx at CES 2010 -South Hall 4/ 35126MP, January 7-10, Las Vegas Convention Center
Join the Xilinx® Consumer team at CES 2010 for an exhibition of leading-edge high volume, cost sensitive solutions for video applications. Click here to learn how you can register as a Xilinx guest and receive a FREE Exhibits Plus badge for the show now.
Wired Communications
Video Presentation Features 2nd Generation Xilinx 100Gigabit Ethernet
View a hardware demonstration of the second-generation Xilinx® solution for 100Gigabit Ethernet enabled by Virtex®-5 TXT FPGAs. View it today!
Wireless Communications
Visit Xilinx at SDR'09-Booth #19, December 1-4, Hyatt Regency Crystal City
Join the Xilinx® Wireless team at SDR’09 for the latest programmable platforms for software-defined radio in military, civil, and commercial applications. Don’t miss out on our schedule of workshops, tutorials, and technical sessions. Learn more about Xilinx participation at the show and register for the show now.
Services, Events & Education
On-Demand Webinar Focuses on Memory Interfaces with Xilinx Virtex-6 and Spartan-6 FPGAs
In this on-demand webinar, Xilinx® introduces the memory interface solutions for Virtex®-6 and Spartan®-6 FPGAs and explains how to use these solutions to get the most out of the external memory in your next Spartan-6 or Virtex®-6 FPGA design project. View it now.
Live Web Seminar, Tuesday, December 15th: “Embedded Software Development with FPGA-based platforms”
Register to view the upcoming December 15th web seminar and see how targeted design platforms can help accelerate Spartan®-6 and Virtex®-6 Embedded FPGA system design. Register today!
On Demand Webcast “Accelerate FPGA Designer Productivity with ISE Design Suite”
View the on-demand web seminar “Accelerate FPGA Designer Productivity with ISE® Design Suite” to learn tricks and tips on how to effectively and efficiently design new systems based on the popular Spartan®-6 and Virtex®-6 FPGAs. Visit...
Updated Course: Advanced FPGA Implementation
The Xilinx® Global Training Solutions group has updated the popular course Advanced FPGA Implementation in support of the release of Virtex®-6 and Spartan®-6, and ISE® Design Suite version 11.3. To learn more, visit…
Updated Course: DSP Design Using System Generator
The Xilinx® Global Training Solutions group has updated the popular course DSP Design Using System Generator in support of the release of Virtex®-6 and Spartan®-6, and ISE® Design Suite version 11.3. To learn more, visit...
Updated Course: ISE Design Tool Flow
The Xilinx® Global Training Solutions group has updated the popular ISE® Design Tool Flow customer training course in support of the launch of the Virtex®-6 & Spartan®-6 FPGA families as well as ISE Design Suite version 11.3. To learn more, visit...
Updated Course: Essentials of FPGA Design
In support of the release of the Virtex®-6 and Spartan®-6 FPGA families and ISE® Design Suite version 11.3, The Xilinx® Global Training Solutions has updated the popular course ISE Design Tool Flow. For more information, visit...
Updated Course: Designing for Performance
The Xilinx® Global Training Solutions group has updated the popular customer education course Designing for Performance in support of the release of the Xilinx® Spartan®-6 and Virtex®-6 FPGA families and ISE® Design Suite. For more information, visit...
Updated Course: Designing with Multi-Gigabit Serial I/O
The Xilinx® Global Training Solutions group has updated the popular customer education course Designing with Multi-Gigabit Serial I/O in support of the release of the Xilinx® Spartan®-6 and Virtex®-6 FPGA families and ISE® Design Suite. To learn more, visit...
Updated Course: Debugging Techniques Using the ChipScope Pro Tools
This updated course from the Xilinx® Global Training Solutions group extends this previous 1-day class to 2 days with a focus on the basics and practical applications of the ChipScope Pro Tool for ISE® Design Suite 11.3 and Xilinx’s new FPGAs. For more information, visit...
Free Xilinx E-Learning Sessions Updated for New FPGAs and Tools
The Xilinx® Global Training Solutions group has updated several of its free e-learning sessions for Virtex®-6, Spartan®-6 and ISE® Design Suite version 11. Updated sessions include Basic FPGA Configuration (Parts 1 & 2); Architecture Wizard and PinAhead; Basic FPGA Architecture: Slice and I/O Resources (for Spartan-6 & Virtex-6 FPGAs); ChipScope Pro Software; Virtex-6 and Spartan-6 FPGA HDL Coding Techniques (Parts 1 & 2); Power Estimation; Synthesis Options; Basic HDL Coding Techniques (Part 1 & 2). To take these updated courses, visit...
Xilinx Partner Spotlight
Nallatech Announces DATA-V5 Memory and I/O Module
The Nallatech DATA-V5 features a Xilinx® Virtex®-5 FPGA, two banks of DDR2 SDRAM, two banks of QDR-II SRAM and 8-lanes of off-card high speed serial I/O. The DATA-V5 is compatible with Nallatech PCIe® COTS motherboards and is targeted at algorithm acceleration and signal intelligence applications. For more information, visit…
NEC Display Solutions Selects intoPIX Technology
intoPIX, a leading JPEG 2000 solutions provider, announced that NEC Display Solutions has integrated intoPIX JPEG 2000 and AES core technology into their DLP Cinema projector. Read more…
CommAgility Releases Two New High-Speed Processing AMCs
CommAgility has released two new high-speed processing AMCs based on a Virtex®-5 FPGAs. The AMC-V5F-10G and AMC-V5Fe provide high performance processing and flexible, fast I/O, and are aimed at the latest wireless baseband standards like LTE, and other demanding applications. The V5F-10G includes a 10Gbps Ethernet interface, and the V5Fe includes PCI Express®. Visit…
Mentor Graphics Releases Largest-Ever HyperLynx upgrade
Almost three years in the making, HyperLynx 8.0 including improvements in FastEye serdes channel analysis; easy-to-use DDR/2/3 interface verification; and a new product for power-integrity analysis (DC Drop, decoupling, and more). Visit…
Silicon Interfaces Spins Infiniband 4X Link Protocol Engine
Design Services group Silicon Interfaces is now offering SI19IB40, a switch-based serial I/O interconnect architecture operating at a speed of 10 Gbps for 4X in each direction. The architecture transmits and receives all kinds of InfiniBand packets and generates and performs the 32-bit invariant cyclic redundancy checks and 16-bit variant cyclic redundancy checks. Visit…
Silicon Interfaces Revs IEEE 1394a-2000 Link Layer Controller
Design Services group Silicon Interfaces is now offering a IEEE 1394a-2000 Link Layer Controller core, which provides data packet delivery service for asynchronous and isochronous (real-time) data transmission for a high speed serial bus connectivity. Visit…
CoreEL Digital Video Solutions for Broadcast Apps
CoreEL offers high performance H.264 and MPEG-2 decoder IP cores for broadcast & professional video applications. The decoder solutions support resolution/frame rates up to 1080p60, chroma format up to 4:2:2 and bit rate up to 100 Mbps. Both Source code and Netlist licensing options are available here...
iW-SDXC Host Controller IP Core
iWave has announced its Host Controller for SDXC card, which is compatible with the SD Physical Layer specification V3.0. The core supports 32-bit AHB LITE Host interface and is compatible with the standard register set for the host controller as per SD host controller specification version 3.0. Visit…
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