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Free ChalkTalk Webcast:

Xilinx Power Estimation in a High-Level DSP Design Flow

Join us to learn how to better manage power in your next FPGA design.

Tim Vanevenhoven, Senior Marketing Manager for Xilinx DSP Tools and IP will discuss how technologies included in the ISE(R) Design Suite 11 can help you better control power within your FPGA design, including power estimation, optimization, and analysis.

Attend and learn more about Spartan(R)-3A FPGA cost-saving features inclucing:
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Xilinx comprehensive power strategy
- Early power estimation using XPower Estimator Spreadsheets
- Resource information using XPower Analyzer to explore power reduction
- Implementation options to reduce power during synthesis and implementation

New features within System Generator for DSP to manage power
- Power analysis within theSimulink(R) environment
- Example design modifications to help reduce dynamic power

View this ChalkTalk presentation Â*and give us your feedback to be entered to win a Spartan®-6 Evaluation Kit

View Webcast now!
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