FPGA Central - World's 1st FPGA / CPLD Portal

FPGA Central

World's 1st FPGA Portal

 

Go Back   FPGA Groups > Mailing List > Newsletter

Newsletter Various newsletters related to FPGAs

Reply
 
LinkBack Thread Tools Display Modes
  #1 (permalink)  
Old 06-30-2009, 12:04 AM
Journal Surveys
Guest
 
Posts: n/a
Default Journal Surveys: High Level Design Survey

High Level FPGA Design Survey










High Level FPGA Design Survey



 



We would appreciate a few minutes of your time to respond to a brief survey on high level design tools.



 





Techfocus Media, Inc. (publishers of IC Design and Verification Journal, Embedded Technology Journal, and FPGA Journa) is conducting a research study about the High-Level design environments and tools. If you are designing ASICs, ASSPs, FPGAs, SoCs, or other custom digital or analog systems, we'd like to learn more about your design flow, your modeling environment, your tools, and your methodology. It will just take a few minutes to complete.



 



Click here to take the survey.




 



As a token of our appreciation, fifty respondents will be selected at random to receive a $25.00 gift certificate from Amazon.com.




Even if you don't get a gift certificate, you'll have the satisfaction of helping the electronics industry better serve you with high-quality design tools. Plus, you'll have our undying gratitude. You just can't put a price on that, can you?



You are receiving this invitation because you checked the little box that said "I am willing to participate in occasional surveys" when you subscribed to FPGA Journal, Embedded Technology Journal, IC Journal or Journal Webcasts. That time has now come. See, it's not so bad, is it? 










Last chance to take the survey....click here



 



All material copyright © 2003-2009 techfocus media, inc. All rights reserved.
Privacy Statement



 





If you do not wish to be notified of future surveys,
please click here to unsubscribe
(But come on...it's only "occassional")











 





 


Reply With Quote
Reply

Bookmarks

Thread Tools
Display Modes

Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

BB code is On
Smilies are On
[IMG] code is On
HTML code is On
Trackbacks are On
Pingbacks are On
Refbacks are On


Similar Threads
Thread Thread Starter Forum Replies Last Post
Journal Surveys: FPGA Design Project Survey Journal Surveys Newsletter 0 05-26-2009 06:44 PM
Journal Surveys: FPGA Vendor Tool Survey Journal Surveys Newsletter 0 04-07-2009 01:23 AM
High level modeling with SystemVerilog gtwrek@pacbell.net Verilog 5 06-15-2007 05:57 PM
International Journal of High Performance Systems Architecture (IJHPSA) nadia@eng.uerj.br FPGA 0 07-14-2006 06:45 PM
level converter for high frequencies Stefan Oedenkoven FPGA 3 10-12-2004 07:58 PM


All times are GMT +1. The time now is 03:34 AM.


Powered by vBulletin® Version 3.8.0
Copyright ©2000 - 2010, Jelsoft Enterprises Ltd.
Search Engine Friendly URLs by vBSEO 3.2.0
Copyright 2008 @ FPGA Central. All rights reserved