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11-19-2009, 08:03 AM
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High-Speed Board Layout Challenges in FPGA/SDI Sub-Systems / 10 Emerging Technologies / More
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Programmable Logic DesignLine Newsletter ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ The Programmable Logic DesignLine Newsletter is delivered to you free of charge from the staff of Programmable Logic DesignLine. To view the Programmable Logic DesignLine visit: http://newsletter.designlinenetwork....rT0LOB0DT6t0Eg 11-19-2009 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ This issue sponsored by: ALTERA CORPORATION Altera's new Cyclone IV FPGA family extends the Cyclone FPGA series leadership in providing the market's lowest cost, lowest power FPGAs, now with a transceiver variant. The Cyclone IV FPGA family is targeted to high-volume, cost-sensitive applications, enabling system designers to meet increasing bandwidth requirements while lowering costs. Learn more about Cyclone IV FPGAs! http://newsletter.designlinenetwork....rT0LOB0HVl80Eg ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ EDITOR'S NOTE The incredible increases in video resolution over the past several years have led to dollars for the electronics industry and better viewing at home. But it hasn't been accomplished without a healthy dose of elbow grease on the part of many, including hardware engineers and physical layout designers. As feature-rich FPGAs and multi-rate SDI ICs are implemented in video systems to support long-range video transport, they've introduced their own special set of challenges. This week's design feature, courtesy of National Semiconductor Corp., outlines the layout challenges facing hardware engineers and provides recommendations for dealing with them. http://www.pldesignline.com/221900185 Another special item featured this week, written by Ted Speers of Actel Corp., takes us on a trip down memory lane, to a time, not all that long ago, when many of the consumer electronics devices that are ubiquitous today did not yet exist. This viewpoint article asks us to think about what other nifty inventions that have not yet been conceived might be over the horizon, and how programmable logic will play a role in their creation. http://www.pldesignline.com/news/221900152 Product announcements this week include a new targeted design platform from Xilinx for broadcast connectivity, new IP offerings from Altera and Actel, and an announcement from Lattice Semiconductor of volume production of the highest-density member of its ECP3 family. Get the lowdown in the product section. http://www.pldesignline.com/products In news this week, we've offer the latest upward revision of Gartner Inc.'s semiconductor market forecast and a report on 10 emerging technologies to watch in 2010. http://www.pldesignline.com/news Also, a word about our fundamentals courses: Touch control is rapidly replacing physical buttons, sliders, and wheels in the human-machine interface (HMI), but are you up to speed on basic principles and the capacitive variant? In the Fundamentals of Capacitive Touch Control, Steve Bitton takes you from theory of operation right through to an evaluation kit demonstration. http://www.techonline.com/learning/course/218600097 While you're at it, stop by the Fundamentals of High-Speed Transceivers in FPGAs to get the basics of transceiver operation and how to work with one on an FPGA. http://www.techonline.com/learning/course/218600106 And last but not least: It's one thing to understand the specifications and internal architectures of analog/digital (A/D) and digital/analog (D/A) converters, it's another to be able to navigate the maze of available converters and design effectively with them such that you realize their full performance capabilities. In "Fundamentals of Choosing and Using A/D and D/A Converters," Planet Analog editor Bill Schweber helps you do just that. With a "pin-in, black-box" view of converters he takes you through and explains the factors you need to consider when selecting the most appropriate converter for your application. http://www.techonline.com/learning/course/221100154 Questions, Ideas, Comments, Complaints? Email me: dmcgrath (AT) techinsights (DOT) com FEATURED HOW-TO ARTICLE --High-Speed Board Layout Challenges in FPGA/SDI Sub-Systems -- Many video systems are implemented with feature-rich FPGA and multi-rate SDI integrated circuits that support high performance professional video transport over long distances. But FPGAs demand high density routing with fine trace width while high-speed analog SDI routing demands impedance matching and signal fidelity. This paper outlines the layout challenges facing hardware engineers and provides recommendations for dealing with these challenges. http://newsletter.designlinenetwork....rT0LOB0HWrT0EH RECENT HOW-TO ARTICLES OF INTEREST --Enable low power design with FPGAs-- Size and power considerations are now often the top priority in many system designs, but portability and long-lasting power can become conflicting design requirements. FPGAs seem like the best choice but warning: not all FPGAs are created equal, especially in portable, low-power applications. http://newsletter.designlinenetwork....rT0LOB0HVmJ0Ez --I/O Design Flexibility with the FPGA Mezzanine Card -- The FPGA's inherent flexibility has proven indispensable for the creation of external I/O interfaces. However, unless I/O is implemented on a daughter card (mezzanine module), replacing the physical I/O components and connectors requires changing the FPGA board design. The FPGA Mezzanine Card (FMC) standard, developed by a consortium of companies ranging from FPGA vendors to end users, specifically targets FPGAs, increasing I/O flexibility and lowering costs in a broad range of applications. http://newsletter.designlinenetwork....rT0LOB0HVGc0Em ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ TOP PRODUCTS --Xilinx unveils platform for broadcast connectivity-- Programmable logic vendor Xilinx introduced the latest of its targeted design platforms, this one targeting broadcast connectivity applications. http://newsletter.designlinenetwork....rT0LOB0HWrU0EI --Highest-density LatticeECP3 in volume production-- Lattice Semiconductor announced that its LatticeECP-150 mid-range FPGA has been fully qualified and released to volume production. http://newsletter.designlinenetwork....rT0LOB0HWrV0EJ --Altera offers RapidIO 2.1 IP core-- Altera announced the immediate availability of an intellectual property core supporting the RapidIO 2.1 specification. http://newsletter.designlinenetwork....rT0LOB0HWrW0EK --Actel unveils IP core enhancements for hardware platform management-- Following on from its acquisition of Pigeon Point Systems last year, Actel has announced IP core enhancements to its Fusion mixed-signal FPGAs that cater to platform management applications, particularly xTCA. http://newsletter.designlinenetwork....rT0LOB0HWrX0EL TOP NEWS ITEMS --Viewpoint: Caution, objects in the crystal ball are closer than you think-- Many of the consumer electronics products that are ubiquitous today have been around less than 10 years. Likewise, products we've not conceived of will dominate the future. And low-power FPGAs will play a key role. http://newsletter.designlinenetwork....rT0LOB0HWrY0EM --Ten emerging technologies to watch in 2010-- EE Times has compiled a list of emerging technologies that we think will be worth watching out for in 2010. http://newsletter.designlinenetwork....rT0LOB0HWrZ0EN --Gartner revises '09 chip forecast again -- Market research firm Gartner has again raised its 2009 semiconductor sales forecast due to improving market conditions. http://newsletter.designlinenetwork....rT0LOB0HWra0EU AVAILABLE COURSES --Multi-core & Multi-OS: The Future of Embedded Systems-- This webinar includes a briefing from the Mentor Graphics OS engineering team, who will discuss the implementation of Nucleus OS and Linux on the Marvell Sheeva MV78200 Dual-core Embedded Processor. http://newsletter.designlinenetwork....rT0LOB0HUkc0EN --Thank an Engineer for Streaming Video -- A short, fun video thanking engineers for making home movies more enjoyable with streaming video. http://newsletter.designlinenetwork....rT0LOB0HWrb0EV --Calibre Solutions for Advanced DRC-- This web seminar will address the latest Calibre solutions for advanced verification including eqDRC " Solutions for Advanced Layout Checking, gridDRC - Solutions for Restrictive Design Rules and PERC " Solutions for Advanced ERC, ESD, and Multi Power Domain. http://newsletter.designlinenetwork....rT0LOB0HVmR0E8 --Fundamentals of Choosing and Using A/D and D/A Converters-- The course looks at analog signal ranges, digital protocols and formats, serial versus parallel interfaces, internal and external references and clocks, drivers and buffers, isolation, and filters--and how their choices affect overall signal-chain performance. The course will focus on tradeoffs and optimizing overall performance so the selected converter meets its potential in your application. http://newsletter.designlinenetwork....rT0LOB0HVhb0EK FINAL NOTE That's all for this week, but don't forget that this newsletter contains only a subset of what's available on the Programmable Logic DesignLine website.
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