FPGA Journal Update
a techfocus media publication :: June 2, 2009 :: volume XXIII, no. 09
FROM THE EDITOR
Ever wish you could just design your own
FPGA customized to your company's application area? With a new tool and IP solution from Akya, you can do something close to that. Akya lets you design a system of datapath, controller, and memory units that can be dynamically reconfigured. Our latest feature has the details.
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Kevin Morris – Editor in Chief
Techfocus Media, Inc.
EVENTS & ANNOUNCEMENTS
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LATEST NEWS
June 2, 2009
Lattice Releases Industrial Temperature-Qualified LatticeXP2 FPGA Family To Volume Production
Guzik Adds Two New Waveform Digitizers to Its WDM 5000 Family of Modular Systems
SMIC Deploys Synopsys HSPICE Simulator for 45-nm Physical IP and Standard Cell Development
Synopsys IC Compiler Multi-Corner/Multi-Mode Capability Delivers 2X Faster Design Closure
NXP Claims First-to-Market Leadership with High Speed Converters Compliant to New JEDEC Interface Standards
Mentor Graphics Delivers PADS 9.0 Flow Release Featuring the World’s Most Advanced Design Technologies
June 1, 2009
Altium supports Rutgers University student team in developing unmanned aerial systems
Xilinx and LynuxWorks Demonstrate Avionics Application Solution at the Military and Aerospace Forum and Avionics USA Conference 2009
CSPI Announces New FPGA Development Platform
Virtutech Demonstrates Simplified Full-System Build and Test Management Within Virtualized Environments at the IBM Rational Software Conference 2009
Agilent Technologies Introduces Oscilloscopes with Broadest Measurement Capability, Industry's Biggest Display
Altera Ships Highest Density, Highest System-Bandwidth FPGA Targeting 40G/100G Applications
AdvancedIO® Systems Announces Rugged Dual Front-panel 10-Gigabit Ethernet XMC Module with PCI Express Fabric
May 29, 2009
Curtiss-Wright Controls Introduces New Quad Channel ADC FMC Card for Rugged DSP Applications
Curtiss-Wright Controls Ships New Rugged Fiber-Optic Transceiver FPGA XMC/PMC Module
May 28, 2009
TSMC Launches Unified Interconnect Modeling Format for Advanced Process Technologies
Siltrontech Selected as Mainland China and Taiwan Distributor for SiliconBlue FPGAs
May 27, 2009
Avnet and Xilinx Open Registration for X-fest 2009
Actel Announces Winners of 2009 Actel Cup China Students FPGA Design Competition
Actel Space Forum Lands in India
Synopsys Releases DesignWare SATA IP for New SATA 6Gbps Data Transfer Rate
CURRENT FEATURE ARTICLES
Akya Reconfigurable Logic
Roll Your Own
FPGA - Sort of
(Kevin Morris)
Xilinx Strengthens Its Defenses
New
FPGA Families for Mil/Aero
(Kevin Morris)
Cadence Uses the F Word
FPGA PCB Co-design Debuts
(Kevin Morris)
Fusion Finds its Groove
Actel Sees Applications for
FPGA/Analog Hybrid
(Kevin Morris)
Need to Cut Cost, Risk, Time?
Choose the Right
FPGA Design Solution
by Daniel Platzker, Mentor Graphics Corporation
The Presence of Giants
2009 Inventors Hall of Fame Induction Tells a Story
(Kevin Morris)
JOURNAL WEBCASTS
CHALK TALK
FPGA - PCB Co-Design Done The Right Way. Join Amelia Dalton as she talks with Hemant Shah of Cadence Design Systems about new ways to manage the complex issues that arise when trying to optimize pin assignments for both FPGAs and PCBs. (Cadence)
FPGAs Verifying FPGAs. Advanced FPGAs now require a more rigorous verification approach or designers risk spending months in the lab trying to debug their designs in-system. Learn how Device Native® verification integrates seamlessly with your existing
FPGA design tools and delivers significant productivity improvements for verification and debug. (GateRocket)
CHALK TALK Confirma™: The Next Era Of Prototyping. Struggling with
FPGA prototyping boards? Join Amelia Dalton as she talks with Juergen Jaeger of Synopsys about the Next Era of Rapid Prototyping. (Synopsys)
CHALK TALK From Desktop to Target: What You Need From A Development Suite. Is embedded software development and debug a challenge for your team? Join Amelia Dalton as she chats with Jit Sivalogan of Mentor Graphics about setting up a productive environment for embedded development. (Mentor Graphics)
CHALK TALK Simplified Verification of DSP Algorithms in Hardware. Moving algorithms from MATLAB to FPGAs? Join Amelia Dalton as she explores options for verifying DSP designs implemented in FPGAs with Tim Vanevenhoven from Xilinx. (Xilinx)
[click here for more webcasts]
Akya Reconfigurable Logic
Roll Your Own
FPGA - Sort of
(Kevin Morris)
Often, we choose an
FPGA not for just one design, but for a whole class of problems. If we're doing video display products, for example, we may want to design-in an
FPGA that can be reconfigured for a variety of display types and feature sets - depending on display size, formats, signal sources, and a number of other variables. The basic parameters of the application are known - there will be a signal stream coming in, a datapath that processes that stream, a controller that sequences the datapath, some memory elements for buffering and storage, and some output stream.
Wouldn't it be great if you could just design your own reconfigurable logic device - specifically for your application domain, and use it across multiple products - or even product lines? Or, if you're developing application-specific standard parts (ASSPs), wouldn't you like to be able to create a single device that could be dynamically reconfigured to cover a wide range of application variants without having to do a complete chip design for each one? Akya Limited, a UK company, is now providing the technology and IP to allow you to do just that. "Our technology lets you construct a domain-specific, dynamically reconfigurable device," explains Colin Dente - Akya CEO. Akya Reconfigurable Technology (ART), allows you to define a general-purpose set of datapath elements with a flexible interconnect and sequence data through that datapath with a dynamically programmable controll! er.
With Akya's approach, you are doing a very well controlled ASIC design. Unlike an
FPGA, it is not an off-the-shelf part, so you have to bite the bullet for one design cycle and one (and hopefully only one) round of NRE. The advantage, however, is that once you're done, you have a flexible part that is more narrowly optimized for your application area, with correspondingly lower power, better performance, and lower unit cost. For some applications where FPGAs don't meet the minimum requirements for power, performance, or cost, you can still have a single device that is dynamically reconfigurable to span the increasingly challenging range of product variants many design teams are faced with developing. [
more]
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