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Old 04-15-2009, 07:02 PM
FPGA Journal Update
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Default FPGA Journal Update Vol XXIII no. 02

FPGA Journal Update




a techfocus media publication :: April 14, 2009 :: volume XXIII, no. 02











FROM THE EDITOR



Are you an FPGA insider? Do you know about LUTs, HDLs, MGTs and PnR? You do? Well, it's really just all about you, then, isn't it? Of course, someday, FPGA companies might want to also sell products to somebody else. You know, newbies, neophytes, freshmen, people from (ugh) other disciplines? (Yeah, we know why you're making that face.) How are they going to do that, anyway? Our latest feature takes a look.

Also new this week, Darren Zacher of Mentor Graphics brings us a contributed article explaining the ins and outs of incremental synthesis. With today's huge FPGA designs, incremental changes can be dramatically accelerated with tools that can recognize and handle incrementality properly. The trick is getting the turnaround time without giving up your quality of results.

Thanks for reading! If there's anything we can do to make our publications more useful to you, please let us know at:comments (AT) fpgajournal (DOT) com. If you'd rather sound off in public, please post your comments or questions in our Journal Forums.



Kevin Morris – Editor in Chief
Techfocus Media, Inc.











EVENTS & ANNOUNCEMENTS











Introducing Arria II GX FPGAs
Arria® II GX FPGAs are the lowest power FPGAs with 3.75-Gbps transceivers. Designed for cost-sensitive applications, Arria II GX FPGAs are based on a 40-nm full-featured FPGA fabric and offer improvements in usability that allow you to complete your projects faster.
View the Arria II GX webcast to learn more.





















FPGA Vendor Tools Survey - You could win a cool new MSI Wind Netbook if you take a minute to fill out a brief survey on FPGA Vendor Design tools.  You'll also help the industry provide you with better design tools.  Doesn't that sound like a win-win situation?
Click here to take the survey.





















Take our BRAND NEW
SUPER QUICK, JUST A COUPLE OF QUESTIONS,
WON'T TAKE MUCH TIME AT ALL (WE PROMISE)
2009 Journal Reader Survey.

WEIGH IN NOW!!

















LATEST NEWS



April 14, 2009



The Latest In Emerging Robotics Products To Be Presented At The 6th Annual Robobusiness Conference And Exposition



European SystemC User Group (ESCUG) Meeting April 21 Co-Located with DATE 2009



April 13, 2009



Origin Electronics Named Distributor For Lattice Semiconductor In Greater China



Altera Arria GX FPGAs Enable Panasonic P2 Drive to Transfer Video Faster Than You Can Say Edit



Hypres, ViaSat and SPAWAR Systems Center Pacific Demonstrate Industry’s First All-Digital Multi-Net Link-16 Receiver



EVE Significantly Enhances Hardware Debugging Capabilities of Its Leading Emulation Platform



April 10, 2009



Altera Selects Lorentz Solution PeakView EM Tool Suite for High-Speed Designs



National Semiconductor to Demonstrate Energy-Saving Professional and Broadcast Video Products at NAB 2009



April 9, 2009



DSP for FPGAs Technical Course in May in Munich



April 8, 2009



Mentor Graphics Introduces Next-Generation VeSys Electrical Design Software









CURRENT FEATURE ARTICLES



Preaching to the Choir
Proselytizing Programmable Logic
(Kevin Morris)
Incremental Synthesis: Achieving Shorter Design
Cycles Without Quality Trade-Offs

by Darren Zacher, Mentor Graphics
Kicking a Dead Horse
FPGAs Going the Distance Against ASIC
(Kevin Morris)
Building ‘Image Format Conversion’ Designs for Broadcast Systems
by Suhel Dhanani & Girish Malipeddi, Altera Corporation
Retro Revolution
The New Vintage FPGAs
(Kevin Morris)
Superlative Soup
The Three Biggest Baddest FPGAs
(Kevin Morris)
GateRocket Blasts Off
FPGAs Verifying FPGAs (Kevin Morris)



JOURNAL WEBCASTS



CHALK TALK Confirma™: The Next Era Of Prototyping. Struggling with FPGA prototyping boards? Join Amelia Dalton as she talks with Juergen Jaeger of Synopsys about the Next Era of Rapid Prototyping. (Synopsys)

CHALK TALK From Desktop to Target: What You Need From A Development Suite. Is embedded software development and debug a challenge for your team? Join Amelia Dalton as she chats with Jit Sivalogan of Mentor Graphics about setting up a productive environment for embedded development. (Mentor Graphics)

CHALK TALK Simplified Verification of DSP Algorithms in Hardware. Moving algorithms from MATLAB to FPGAs? Join Amelia Dalton as she explores options for verifying DSP designs implemented in FPGAs with Tim Vanevenhoven from Xilinx. (Xilinx)

CHALK TALK Using Embedded Hypervisors in Mobile Devices. Join Amelia Dalton as she explores the use of embedded hypervisors to create safe and secure software for mobile devices with Rob McCammon of Open Kernel Labs. (Open Kernel Labs)



[click here for more webcasts]












Preaching to the Choir
Proselytizing Programmable Logic
(Kevin Morris)

The faithful are easy.

An FPGA company rolls out a new line and the bragging begins:  "More LUTs, increased Fmax, Shorter PnR runs, faster MGTs!" 

The faithful are impressed: "Yes!  Tell us more!  Have you increased the LUT width?  Added more FF's to your LEs? Diversified your mix of hardened IP blocks? Increased the BRAM ratio? " 

(The Faithful talk like that most of the time - all acrimoniously acronymic, feasting in their insider insight, devouring the minutiae with reckless abandon, disdainfully dismissing the unwashed masses.)

The rest of the world, however, is less easily amused:  "FGP- what?  Can I make a digital camera out of one?  Or is this a new name for the LPGA?  What's a LUT?" [more]







Incremental Synthesis: Achieving Shorter Design Cycles Without Quality Trade-Offs
by Darren Zacher, Mentor Graphics

Hardware designers are a proud and detail-oriented group that takes great personal pride in the product of its efforts. Many engineers are drawn to hardware design—rather than, say, software work—to give their detail-oriented nature room to thrive. As early as their first freshman lab exercises, budding hardware designers learn that a software bug can easily be fixed by editing a text file and recompiling (though admittedly those who learned during the punch-card era may disagree with this attitude). But a hardware design error can be far more costly to one’s social schedule. A hardware design flaw might mean completely re-doing a wire wrap board instead of enjoying that Friday night trip to the pub. Suffice to say, lessons about the importance of up-front validation are strongly reinforced from the very beginning. Shared experiences like these have spawned a culture of thoroughness and pride! in quality among hardware designers. [more]






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