FPGA Central

FPGA Journal Update




a techfocus media publication :: March 17, 2009 :: volume XXII, no. 11











FROM THE EDITOR



This week, we take a look at GateRocket and their RocketDrive verification system. RocketDrive basically accelerates your simulation of FPGA hardware in software by using the actual FPGA hardware to emulate... itself? Our latest feature unravels the knot.

Our second article, from Ajay Jagtiani of Altera, gives us an update on the use of physical synthesis in FPGA designs. As our designs grow faster and more complex and our devices feel the pinch of an increasing delay contribution from interconnect, physical synthesis brings our timing estimation and optimization back in line with reality. Our latest contributed article has the details.

Thanks for reading! If there's anything we can do to make our publications more useful to you, please let us know at:comments (AT) fpgajournal (DOT) com. If you'd rather sound off in public, please post your comments or questions in our Journal Forums.



Kevin Morris – Editor in Chief
Techfocus Media, Inc.











EVENTS & ANNOUNCEMENTS











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LATEST NEWS



March 17, 2009



Altera Ships Industry’s Highest Density Transceiver FPGAs



Leading Embedded COTS Vendors Declare Support for Open Standards Model



March 16, 2009



National Instruments Announces New Version of CompactRIO Module Development Kit to Simplify Custom Module Design



Altera's Embedded Systems Development Kit Accelerates the Creation of Cyclone III FPGA-Based Embedded Designs



K-micro Announces Availability of FPGA Board for the CatsEye Development Systems



Synopsys Announces Yield Explorer - Design-Centric Yield Management for Product Engineering Teams



Cray Selects FirstPass Engineering for ASIC Design Services in Next-Generation Supercomputer Platform



Synopsys Introduces Lynx Design System



Actel Announces softconsole version 2.2 - Free Embedded Software Development Environment



Atmel Collaborates with IAR Systems to Accelerate Application Development for AT91SAM ARM Micros



Achronix Establishes Distribution Channels in Europe and Israel to Meet Growing Demand for Its Speedster 1.5 GHz FPGAs



March 12, 2009



Connect Tech and QNX enter into partnership for Xilinx hardware and support needs.



DAQTron Introduces Industry's First DOCSIS 3.0 RF Protocol Analyzer



March 11, 2009



Patent and Licensing Experts to Reveal Best Practices for Protecting, Managing and Leveraging Intellectual Property at 2009 IP Symposium



10th Annual ISQED Draws Record Attendance; Free Registrations Include Access to Exhibits, Technical Presentations, Keynotes and Embedded Tutorials



DO-254 Users Group Forms a US Chapter, Affiliates with European Counterpart










CURRENT FEATURE ARTICLES



GateRocket Blasts Off
FPGAs Verifying FPGAs (Kevin Morris)
How Physical Synthesis Enables FPGA Design Productivity
by Ajay Jagtiani, Altera Corporation
FPGAs and the IC Bubble
The Techonomics of Programmability (Kevin Morris)
A Synthesis & Partitioning Strategy for Effective Multi-FPGA Prototyping
by Nang-Ping Chen, Auspy, Inc. and Ehab Mohsen, Mentor Graphics
Simplifying DDR
Mentor’s New DDR Wizard (Bryon Moyer)
Free Linux Microprocessor*
(Some Restrictions Apply)
(Jim Turley)
Lattice Strikes Back
Low-cost, Low-power with SerDes - New ECP3
(Kevin Morris)



JOURNAL WEBCASTS



CHALK TALK Confirma™: The Next Era Of Prototyping. Struggling with FPGA prototyping boards? Join Amelia Dalton as she talks with Juergen Jaeger of Synopsys about the Next Era of Rapid Prototyping. (Synopsys)

CHALK TALK From Desktop to Target: What You Need From A Development Suite. Is embedded software development and debug a challenge for your team? Join Amelia Dalton as she chats with Jit Sivalogan of Mentor Graphics about setting up a productive environment for embedded development. (Mentor Graphics)

CHALK TALK Simplified Verification of DSP Algorithms in Hardware. Moving algorithms from MATLAB to FPGAs? Join Amelia Dalton as she explores options for verifying DSP designs implemented in FPGAs with Tim Vanevenhoven from Xilinx. (Xilinx)

CHALK TALK Using Embedded Hypervisors in Mobile Devices. Join Amelia Dalton as she explores the use of embedded hypervisors to create safe and secure software for mobile devices with Rob McCammon of Open Kernel Labs. (Open Kernel Labs)



[click here for more webcasts]












GateRocket Blasts Off
FPGAs Verifying FPGAs (Kevin Morris)

The system is both elegant and enigmatic.

When visitors see the RocketDrive sitting on your lab bench (particularly if it is plugged into the handsome show-floor-worthy box currently making the rounds at trade shows), your "cool factor" will definitely creep up a notch or two.  When you use it to help you knock bugs out of your next FPGA design, you'll most likely be pleased with your purchase.  GateRocket's RocketDrive is a useful tool for FPGA designers.  

You have to be careful, though, not to think about it too hard.

You see, if you've been doing FPGA design for awhile, you probably have first-hand experience with the history of FPGA de-bugging and "verification" methodologies.  [more]







How Physical Synthesis Enables FPGA Design Productivity
by Ajay Jagtiani, Altera Corporation

As FPGAs increase in density, system designers are using these increased densities to the maximum by creating larger and more complex designs. These large designs are based on design requirements that either requires adding new functionality to an existing application such as a channel card or a line card used in wireless applications or reducing board real estate by combining the functionality of two chips into a single device or creating new designs for new applications.

These varied designs could contain legacy code for an application or a DSP class design that has a high latency requirement. For such classes of designs the synthesis tools may not optimize the design optimally, which leads to long critical paths. The reason for these long critical paths is that logic synthesis tools depend on estimated delays to synthesize designs. [more]






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