FPGA Central

TechOnline Spotlight Newsletter
May 7, 2009
C674x Core Overview
Learn about the C674x core which combines the ease-of-use and precision of floating-point programming with the connectivity and lower-cost options of fixed-point devices.

C6743 Videocast
Learn about the C6743 DSP: a low-power digital signal processor based on C674x DSP core. It provides significantly lower power than other members of the TMS320C6000 platform of DSPs and enables OEMs and ODMs to quickly bring to market devices featuring high processing performance.
 
Accelerating Device Time-to-Market with Embedded Software Test
This webinar will explore the challenges facing device delivery teams and demonstrate this new tool's powerful automation features for manual and scripted system test, white box testing, lab device management, runtime code coverage, performance profiling, and advanced diagnostics.
 
Leveraging Multicore & Virtualization
We will discuss how the availability of multicore processors for the embedded marketplace opens new opportunities for device manufacturers that include better efficiency and more functionality for less cost. We will also explore the use of virtualization to consolidate hardware and reduce bill of materials.
 


Serial ATA Revision 3.0 PHY Testing Challenges: Verify your 6Gbps design to the specification
Wed., May 13, 2009 9AM PST / 12PM EST
Serial ATA is the primary storage I/O interface used in all computing systems today, and is quickly gaining share in enterprise data storage and embedded data file applications for consumer electronics. As with any high-speed serial interconnect, interoperability of components relies on the integrity of the physical layer performance characteristics such as jitter, amplitude, common mode voltage and state machine timing execution. Agilent provides complete coverage of the physical layer validation requirements for SATA with test solutions for transmitter, receiver and channel compliance test and characterization. Agilent technical experts and SATA-IO contributing members will discuss key testing requirements and test techniques required for SATA interoperability at 1.5Gb/s, 3.0Gb/s and 6.0Gb/s data rates. Sign up today by clicking here.

Introduction to NXP's new LPC1700 Cortex-M3 Microcontroller
Tues., May 19, 2009 8AM PST / 11AM EST
NXP introduces its new LPC1700 Cortex-M3 microcontroller family. The LPC1700 is a highly integrated, high performance microcontroller based on revision 2 of the Cortex-M3 core. This family leverages NXP's microcontroller expertise with outstanding peripherals including: Ethernet, USB (Host, Device/OTG), CAN, 12-bit ADC, DAC, motor control PWM, I2S, ultra-low power RTC and a host of others. NXP's unique blend of peripherals and versatile bus architecture make this suitable for a wide range of applications, from simple to demanding. NXP's LPC1700 processor is targeted at 8-, 16- and 32-bit applications. Topics covered include a brief overview of the Cortex-M3 architecture, NXP's implementation and peripherals, development tools and software environment. This presentation is suitable for both ARM veterans and newcomers alike. Sign up today by clicking here.

ISE Design Suite 11 - The Design Methodology for Targeted Design Platforms
Tues., May 19, 2009 11AM PST / 2PM EST
Dramatic shifts in the economic and technical landscape have created a need for more flexible, cost-effective approaches to developing and manufacturing of today's high-tech products. These marketing forces combined with demanding technical requirements are driving the ever-increasing adoption of FPGAs in the heart of digital electronic systems. 'Targeted Design Platforms', built on an FPGA foundation, directly address the competing needs of higher performance, streamlined power consumption and reduced system cost by integrating software and hardware components that enable designers to accelerate innovation. Signup today by clicking here.

Understanding and Optimizing Sampled Data Systems (Part II)
Wed., May 20, 2009 9AM PST / 12PM EST
Part II will take a detailed look at the prevailing data converter architectures and provide an understanding of where sampling vs. quantization vs. digitization takes place, and more importantly, how this impacts the correct choice of converter for a given application. The sources and management of sampling anomalies effecting linearity, distortion, and noise will be discussed, along with many tried and true data converter application tips and techniques to insure an optimum system design. Sign up today by clicking here.

RF Sensor Networks for Improved Signal Detection and Geo-location
Wed., May 20, 2009 11AM PST / 2PM EST
This webinar explores the use and performance of RF sensor networks for improved detection, identification, and geo-location of modern signals using coherent detection, proximity gain, and time-difference of arrival. Sign up today by clicking here.




• Opinion: Winners, losers in Renesas-NEC deal
• Updated: IBM responds to union complaints
• Analysis: Can Freescale beat the odds?


Improve Instrument Amplifier Performance with X2Y Optimized Input Filter
Johanson Dielectrics, March 2009

Isolated Supply Overview and Design Trade-Offs
National Semiconductor, March 2009

Single Chip Coherent Multiprocessing
MIPS, April 2008

Migrating Code Between ColdFire V1 and V2
Freescale Semiconductor, TIC Mexico and Go to Market, July 2007







• Using Algorithmic Synthesis to Design Fourth Generation Cellular Hardware Accelerators
• Take advantage of powerline communications in nextgen home networking & IPTV designs
• Flat Panel Displays Are Key Focus as Electronics Industry Strives to "Go Green"
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