Xilinx Virtex 5 ISERDES vs ISERDES_NODELAY: which is better for DDR?
The Virtex 5 Library has two design elements for the ISERDES. The
ISERDES_NODELAY obviously does not include the delay element, but it
has another difference. It has a secondary clock input (CLKB) that is
not included in the ISERDES. CLKB is supposed to receive the inverted
CLK for DDR mode.
So I don't understand the difference - why doesn't ISERDES also have
the CLKB input, and which is better to use for DDR mode?
TIA,
Barry
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