FPGA Central

Hi,

Do you have any advice about Intergrated Logic Analizer in FPGA Xilinx?

For a new product, I have to provide an on-board logic Analizer. I will
use ILA with JTAG port.
The question is I don't know which SPARTAN I have to use to do the JOB.

We have to up to 130 Mhz acquisition for 64 bit vectors.
The fifo data depth is not very important -> 16-32k will be enough.

The FPGA will just be used for Logic Analizer JOB, so which FPGA?

Any help will be appreciated.

Laurent
www.amontec.com

"Amontec Team, Laurent Gauch" <[email protected]> wrote in message news:<402212ed$[email protected]>...
> Hi,
>
> For a new product, I have to provide an on-board logic Analizer. I will
> use ILA with JTAG port.
> The question is I don't know which SPARTAN I have to use to do the JOB.
>
> We have to up to 130 Mhz acquisition for 64 bit vectors.
> The fifo data depth is not very important -> 16-32k will be enough.
>
> The FPGA will just be used for Logic Analizer JOB, so which FPGA?

http://wiki.openchip.org/index.php/ChipScope

ChipScopePro 5.1 supported Spartan II/E, Virtex/E/II/Pro

sample width 64 is OK
maximum depth 16K

remember that alls samples goto internal BRAM so as example for
8 bit trigger 64 sample width 16k depth you need 65 BRAMS
so this will limit the selection of suitable FPGA
remember that ChipScope is not free and the ILA cores can not
be used without valid ChipScopePro software license 995$
so by using ChipScope you instantly add 1000$ to the product price.

antti
www.openchip.org