FPGA Central

Hey I am trying to implement Haar discrete wavelet transformation for
image compression on Virtex 2 Pro device. I am using Xilinx Platform
Studio (XPS) for reading image from SYS ACE Flash card embedded on
device and also for processing.

I need to have floating point calculation for wavelet transformation.

Please guide me how to add floating point unit using XPS. Also what
changes should I make in the C code which I wrote in XPS, for reading
and processing image, for implementing it.

Regards,
Mohit Prakash

mopra <mohitprakas@g[email protected]> wrote:
> I need to have floating point calculation for wavelet transformation.

There are various implementations of floating point around,
or you can do your own.

> Please guide me how to add floating point unit using XPS. Also what
> changes should I make in the C code which I wrote in XPS, for reading
> and processing image, for implementing it.

You should not implement C code in an FPGA.

Well, what is your goal? Why are you using an FPGA
instead of, say, an Athlon64? If you want throughput
then I would recommend a systolic array, which will
look very different from the C code.

If you just want to run compiled C code on an FPGA
that is different, but why?

-- glen