FPGA Central

Hi all,

I wanted to know the differnce between a true dual port memory and a
simple dual port memory in FPGA context.

Thanks in advance,
Praveen

<[email protected]> wrote in message
news:[email protected] ups.com...
> Hi all,
>
> I wanted to know the differnce between a true dual port memory and a
> simple dual port memory in FPGA context.
>
> Thanks in advance,
> Praveen
>

Well ... I'll take a guess .. alot of people refer to dual port and two port
memory ...
the difference being that a dual port memory has a read and write capability
on both
ports whereas a two port has a read-only port and a write-only port.

I would bet that a true dual port is the dual port I have described above
and a simple dual port is the two port memory I have described above.

Mike

Well, let's not split hairs !
A dual-port memory has two independent access ports to a common storage
array.
Some dual-port memories can use one port only for write, the other one
only for read (sufficient for FIFOs),
Better designs have no such restriction, they allow read or write on
either or both ports. That's what all Xilinx BlockRAMs do. Such
memories are then referred to as "true dual-port memories".
Interestingly, Xilinx BlockRAMs perform a read operation even during a
write operation on the same port, and have a choice or
read-before-write or write-before-read. That just gives additional
flexibility.
Peter Alfke, Xilinx Applications.

Hi peter,

So what you mean to say is in simple dual port memories one port is
restricted only for write, and the other one only for read.

I read in ALTERA cyclone FPGA's that there memory blocks can be used as

1)Simple dual port memory.
2)True dual port memory.
3)FIFO buffers.
Is it the same in XILINX.

But according to your explanation Simple dual port memory is nothing
but a FIFO, so why have they explicitly mentioned as FIFO buffers.

Please clarify on the 3 types of memory usages.

Thanks in advance,
Praveen

I cannot speak for Altera and their marketing messages.
A "true dual-port memory" is obviously a superset of a "simple
dual-port memory", and it seems that both Xilinx and Altera have this
type of memory.
Dual-ported memories can be used for many things:
FIFOs, LIFOs, Stacks, Caches, Register Files, State Machines, Code
Converters, Sequencers, Counters...

Xilinx Virtex-4 has a built-in "hard" FIFO controller (guaranteed for
500 MHz operation.)
Altera does not have anything remotely similar.
They are just the champions of Marketing B.S., and have been for
decades...
Peter Alfke

On 9 May 2005 23:02:11 -0700, "Peter Alfke" <[email protected]>
wrote:
>I cannot speak for Altera and their marketing messages.
>They are just the champions of Marketing B.S., and have been for
>decades...
>Peter Alfke

Apparently you do speak about A's marketing messages. Don't you think
it's a little bit silly to hide behind a non-X domain to call A names?
I expected better from you and X to be frank.

mk schrieb:
> Apparently you do speak about A's marketing messages. Don't you think
> it's a little bit silly to hide behind a non-X domain to call A
names?
> I expected better from you and X to be frank.

???

1. Peter is well known - he doesn't need to hide hisself
2. if you read carefully, he signed in his first answer with
"Peter Alfke, Xilinx Applications."
3. do you have any "reasonable" comment on Peters answer ?

Jochen

On Mon, 09 May 2005 21:00:04 -0700, praveen.kantharajapura wrote:

> Hi peter,
>
> So what you mean to say is in simple dual port memories one port is
> restricted only for write, and the other one only for read.
>
> I read in ALTERA cyclone FPGA's that there memory blocks can be used as
>
> 1)Simple dual port memory.
> 2)True dual port memory.
> 3)FIFO buffers.
> Is it the same in XILINX.
>
> But according to your explanation Simple dual port memory is nothing
> but a FIFO, so why have they explicitly mentioned as FIFO buffers.
>

You can use the memories in a variety of ways, but they are all based on
either single-port, simple dual-port (independant read and write ports) or
true dual-port (independant bidirectional ports) arrangements. The idea
of a simple dual port memory is that often it is all you need - for
example, it forms the basis of a FIFO - and can be (on Altera devices - I
don't know about Xilinx) twice as wide as true dual-port arrangements. So
you use simple dual-port where it is sufficient, and true dual-port where
it is necessary.

Xilinx devices also have some hardware specifically for making fast FIFOs
(along with a simple dual-port ram block). I've no idea whether this is
faster than corresponding soft logic on Altera devices, but Xilinx
certainly considers it a marketing point so there is presumably some
advantage.

> Please clarify on the 3 types of memory usages.
>
> Thanks in advance,
> Praveen

Here are some tricks:
If you have a true dual-port RAM, but need only a single port, you can
1.
divide the RAM in two (evenly or non-evenly divided) pieces, and
address each from its own port. Now these two RAMs are completely
independent, but are each single-port.
2.
You can make the RAM wider (but also shallower).
In Virtex, the widest dual-port BlockRAM is 512 x 36,
but you can make it into a single-port 256 x 76 memory.
Just remember, you cannot increase the size of the starage array...
Peter Alfke, (with a name like this I can never hide), Xilinx
Applications

[email protected] wrote:

>Hi peter,
>
>So what you mean to say is in simple dual port memories one port is
>restricted only for write, and the other one only for read.
>
>I read in ALTERA cyclone FPGA's that there memory blocks can be used as
>
>1)Simple dual port memory.
>2)True dual port memory.
>3)FIFO buffers.
>Is it the same in XILINX.
>
>But according to your explanation Simple dual port memory is nothing
>but a FIFO, so why have they explicitly mentioned as FIFO buffers.
>
>Please clarify on the 3 types of memory usages.
>
>Thanks in advance,
>Praveen
>
>
>
simple dual port allows random access to both ports, with the
restriction that one port is read only , one is write only with
independent addresses for each port.. It has memory address inputs for
each port. A FIFO buffer typically includes read and write pointers and
flag logic so that the external interface does not include address
inputs. True dual port allows both read and write from both memory
ports. earlier Altera devices (10K and 20K) had simple dual port
memories, while Xilinx FPGAs of the same vintage had true dual port.
Altera's current devices have true dual port memories.

--
--Ray Andraka, P.E.
President, the Andraka Consulting Group, Inc.
401/884-7930 Fax 401/884-7950
email [email protected]
http://www.andraka.com

"They that give up essential liberty to obtain a little
temporary safety deserve neither liberty nor safety."
-Benjamin Franklin, 1759

Hi,

> If you have a true dual-port RAM, but need only a single port, you can
> divide the RAM in two (evenly or non-evenly divided) pieces, and
> address each from its own port. Now these two RAMs are completely
> independent, but are each single-port.

I should point out that Quartus II will do this for you automatically when
additional RAM packing density is needed -- two unrelated single-port
memories can be combined into one true dual-port RAM.

Also, while it is true that in concept a "Simple Dual-Port" is just a "True
Dual-Port" with one port set to always read and one set to always write,
there are some electrical and modeling differences between the two. This
difference results in different timing and power consumption. If you only
need a simple dual-port RAM (one read, one write), you are best off
instantiating the RAM as such.

Regards,

Paul Leventis
Altera Corp.