FPGA Central

Hi, im implementing a 16bit bus along the lines of AMBA APB for some
of my peripherals like IDE ATA controller, LCD dsplay controller, ftdi
usb interface etc. But i found that xilinx spartan devices have no
internal tristate buffers.
I have a dozen or more peripherals to connect. Any idea of how i can
implement this?

thanks,
aravind

>Hi, im implementing a 16bit bus along the lines of AMBA APB for some
>of my peripherals like IDE ATA controller, LCD dsplay controller, ftdi
>usb interface etc. But i found that xilinx spartan devices have no
>internal tristate buffers.
>I have a dozen or more peripherals to connect. Any idea of how i can
>implement this?
>
>thanks,
>aravind

Use multiplexers. Internal tristate buses are deprecated in ASIC designs
and - most wisely, IMHO - not possible in FPGA designs.

RCIngham wrote:
> >Hi, im implementing a 16bit bus along the lines of AMBA APB for some
> >of my peripherals like IDE ATA controller, LCD dsplay controller, ftdi
> >usb interface etc. But i found that xilinx spartan devices have no
> >internal tristate buffers.
> >I have a dozen or more peripherals to connect. Any idea of how i can
> >implement this?
> >
> >thanks,
> >aravind
>
> Use multiplexers. Internal tristate buses are deprecated in ASIC designs,
> and - most wisely, IMHO - not possible in FPGA designs.

Possible - Yes. But big and slow therefore depreciated.
You can code tristate buses and most tolls will emulate them with
multiplexers.

Regards,
Maki

Maki,

If you are thinking CODE REUSE, write using MUX !

The new devices from Xilinx and other vendors do not include the long
Tri-state lines -> So write using MUX !

Laurent
www.amontec.com

wrote:
> RCIngham wrote:
>
>>>Hi, im implementing a 16bit bus along the lines of AMBA APB for some
>>>of my peripherals like IDE ATA controller, LCD dsplay controller, ftdi
>>>usb interface etc. But i found that xilinx spartan devices have no
>>>internal tristate buffers.
>>>I have a dozen or more peripherals to connect. Any idea of how i can
>>>implement this?
>>>
>>>thanks,
>>>aravind
>>
>>Use multiplexers. Internal tristate buses are deprecated in ASIC designs,
>>and - most wisely, IMHO - not possible in FPGA designs.
>
>
> Possible - Yes. But big and slow therefore depreciated.
> You can code tristate buses and most tolls will emulate them with
> multiplexers.
>
> Regards,
> Maki
>

On 18 Sep, 07:33, aravind <aramos...@gmail.com> wrote:
> Hi, im implementing a 16bit bus along the lines of AMBA APB for some
> of my peripherals like IDE ATA controller, LCD dsplay controller, ftdi
> usb interface etc. But i found that xilinx spartan devices have no
> internal tristate buffers.
> I have a dozen or more peripherals to connect. Any idea of how i can
> implement this?
>
> thanks,
> aravind

As the others have said, use muxes on chip. Also, doesn't AMBA APB
uses muxes anyway?

Cheers,
Jon

"Jon Beniston" <[email protected]> wrote in message
news:[email protected] oups.com...
> On 18 Sep, 07:33, aravind <aramos...@gmail.com> wrote:
>> Hi, im implementing a 16bit bus along the lines of AMBA APB for some
>> of my peripherals like IDE ATA controller, LCD dsplay controller, ftdi
>> usb interface etc. But i found that xilinx spartan devices have no
>> internal tristate buffers.
>> I have a dozen or more peripherals to connect. Any idea of how i can
>> implement this?
>>
>> thanks,
>> aravind
>
> As the others have said, use muxes on chip. Also, doesn't AMBA APB
> uses muxes anyway?
>
> Cheers,
> Jon
>

APB uses uni-directional read and write databusses.

Mike

glen herrmannsfeldt wrote:

> I thought the tools would synthesize the appropriate MUX given
> tristate buffer logic. They probably do that better than
> explicitly programmed MUX logic.

I would expect the same utilization for either description.
The question is which description is easier for
the designer to write and test.
That of course, depends on the designer.

-- Mike Treseler

Amontec, Larry wrote:

> If you are thinking CODE REUSE, write using MUX !

> The new devices from Xilinx and other vendors do not include the long
> Tri-state lines -> So write using MUX !

I thought the tools would synthesize the appropriate MUX given
tristate buffer logic. They probably do that better than
explicitly programmed MUX logic.

-- glen

Mike Treseler wrote:

(I wrote)

>>I thought the tools would synthesize the appropriate MUX given
>>tristate buffer logic. They probably do that better than
>>explicitly programmed MUX logic.

> I would expect the same utilization for either description.
> The question is which description is easier for
> the designer to write and test.
> That of course, depends on the designer.

Someone from Xilinx posted a method that uses the FF's in the
FPGA to do this. I presume that only works if the output is
registered, but it does seem to be an interesting solution.
I doubt it will generate that from explicit MUX logic, though.

Also, the cases with more than one selected at the same time
should be "don't care" states, which MUX logic might not
take into consideration.

-- glen

On Sep 18, 5:31 pm, Jon Beniston <j...@beniston.com> wrote:
> On 18 Sep, 07:33, aravind <aramos...@gmail.com> wrote:
>
> > Hi, im implementing a 16bit bus along the lines of AMBA APB for some
> > of my peripherals like IDE ATA controller, LCD dsplay controller, ftdi
> > usb interface etc. But i found that xilinx spartan devices have no
> > internal tristate buffers.
> > I have a dozen or more peripherals to connect. Any idea of how i can
> > implement this?
>
> > thanks,
> > aravind
>
> As the others have said, use muxes on chip. Also, doesn't AMBA APB
> uses muxes anyway?
>
> Cheers,
> Jon

True, AMBA 2.0 suggests we could use separate read and write data
buses. There shouldn't be a problem for write data bus. but for Read ,
multiple peripherals will be driving the PRDATA signals of AMBA APB
controller. Anyway multiplexing seems to be the only way to implement
it. Just wondering, What approach do ASICs, Processors etc use these
days when a tristate bus is ruled out?