FPGA Central

World's 1st FPGA Portal

		FPGA Groups > NewsGroup > FPGA
Spartan-3 Serial LVDS max speed?

FPGA comp.arch.fpga newsgroup (usenet)

LinkBack

Thread Tools

Display Modes

#1 (permalink)

02-10-2006, 03:40 PM

Eric

Guest

Posts: n/a

Spartan-3 Serial LVDS max speed?

The Xilinx App Note, xapp224, suggests that it's possible to do
non-source-synchronous data recovery in a spartan-3 at up to 320 Mbps
(320 MHz) -- has anyone ever managed to get this or higher serial
speeds working in a spartan-3 PQ208 package? I'm trying to make this
work with a 100-ohm differential LVDS link and I can't seem to get my
design up past 150 Mbps. I'm totally willing to entertain the idea
that I've got signal integrity problems, controlled impedance problems,
etc. but I'm worried that the lead inductance on the PQ208 package
might make this sort of IO impossible.

Thanks,
...Eric

Bookmarks

« Software reset for the MicroBlaze | ANTTI*HAPPY: building MicroBlaze uClinux on WinXP full sucess !! »

Thread Tools
Show Printable Version Email this Page
Display Modes
Linear Mode Switch to Hybrid Mode Switch to Threaded Mode

Posting Rules
You may not post new threads You may not post replies You may not post attachments You may not edit your posts BB code is On Smilies are On [IMG] code is On HTML code is Off Trackbacks are On Pingbacks are On Refbacks are On Forum Rules

Similar Threads
Thread	Thread Starter	Forum	Replies	Last Post
FPGA board with High Speed LVDS	mk	FPGA	2	01-25-2006 12:23 PM
JTAG vs. Passive Serial Config speed	Kolja Waschk	FPGA	1	12-17-2004 03:16 AM
Xilinx and Altera -- maximum total bitrate for high-speed serial I/O	Ian Dedic	FPGA	16	11-29-2004 11:33 PM
LVDS on Spartan 3	Chris Cheung	FPGA	0	02-13-2004 09:25 PM

All times are GMT +1. The time now is 04:24 AM.