On Sep 29, 1:47*pm, Uwe Bonnes <b...@elektron.ikp.physik.tu-
darmstadt.de> wrote:
> Hello,
>
> in quest for the HDL source files for the Spartan 6 SP601 Demo board and
> application, all I find ishttp://forums.xilinx.com/xlnx/board/message?board.id=Spartan&thread.i...
>
> > BTW, the design files are 'Coming Soon'....
>
> Some zip files are available at
>
> http://www.xilinx.com/products/board...ce_designs.htm
>
> but they contain very few .v files.
>
> This seems not enough to rebuild (and later adapt) the Ethernet/DSP
> application delivered with the board. Even not to bebuild the build-in self
> test...
>
> Any news about those HDL files?
>
> Thanks
> --
> Uwe Bonnes * * * * * * * *b...@elektron.ikp.physik.tu-darmstadt.de
>
> Institut fuer Kernphysik *Schlossgartenstrasse 9 *64289 Darmstadt
> --------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------
hm i guess you did mean rdf0003.zip
Xilinx is bullshitting again, i would say, there is documentation how
to use the BSRD
BIT file, but no source code.
to Xilinx: NO ONE who is buying SP601 or any other Xilinx board is
interested to
check out if Xilinx supplied BIT files work or not.
Xilinx has todo in house testing, clients can expect it has done, so
there is no
need the customers verify that using the BIT files.
the customers NEED the reference desing SOURCE files, if those are
not available, may as well take the SP601 and try its flying
capabilities.
probably its just a small delay, but hey the boards are out, so should
be refernece designs as well?
Antti