FPGA Central

Hi all,

I am considering to replace a SDRAM with a DDR2 on a custom
Spartan3E1200 board to gain some bandwidth in a Microblaze system.
Currently I am working with OPB_SDRAM core and I am not satisfied with
60MB bandwidth in burst mode (x16 SDRAM and 50MHz clock). It takes 4
cyles to read a word (32bits) and it does not support async clocking,
so OPB clock is the same as RAM clock.
I wonder what can I expect if I use x16 DDR2 RAM coupled to
MCH_OPB_DDR2 (power consumption, bandwidth, problems...).

Cheers,

Guru

On 19 Jul., 23:57, Guru <ales.gor...@email.si> wrote:
> Hi all,
>
> I am considering to replace a SDRAM with a DDR2 on a custom
> Spartan3E1200 board to gain some bandwidth in a Microblaze system.
> Currently I am working with OPB_SDRAM core and I am not satisfied with
> 60MB bandwidth in burst mode (x16 SDRAM and 50MHz clock). It takes 4
> cyles to read a word (32bits) and it does not support async clocking,
> so OPB clock is the same as RAM clock.
> I wonder what can I expect if I use x16 DDR2 RAM coupled to
> MCH_OPB_DDR2 (power consumption, bandwidth, problems...).
>
> Cheers,
>
> Guru

you may have better luck using DDR memory, the DDR controller
is little better in performance then the SDRAM IP core from xilinx.
going with DDR2 on S3E I would not advice unless you really know
what you are doing (and then you would not ask about it..)

Antti