FPGA Central

I need to program a digital PLL in a CPLD.

I tryed to use an external Clock Generator @ 24.576 MHZ, but the data
signal is not exactly that frequency.

So can anyone help me with that problem ???

Look at Lattice's XPLD. They have in each XPLD 2 PLL's that you can
use at will, and you don't consume logic to build the DLL.

Regards

On 16 Sep 2004 08:46:23 -0700, [email protected] (Kriki) wrote:

>I need to program a digital PLL in a CPLD.
>
>I tryed to use an external Clock Generator @ 24.576 MHZ, but the data
>signal is not exactly that frequency.
>
>So can anyone help me with that problem ???