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I'm looking at doing a design with Apex-II parts and will
probably need to use the Verilog synthesizer that comes with
Quartus. My last experience (multiple years ago) was very
unpleasant - lots of synthesis bugs.

Has this gotten better?

My experience with XST synthesis recently has been pretty good,
so I'm debating about sticking with Xilinx for this next project
or jumping to Altera since their Apex-II parts seem to fit my
application a bit better.

Any goog/bad stories?

Thanks!

John Providenza

John Providenza wrote:
> I'm looking at doing a design with Apex-II parts and will
> probably need to use the Verilog synthesizer that comes with
> Quartus. My last experience (multiple years ago) was very
> unpleasant - lots of synthesis bugs.

Yes, synthesis used to be unusable.

> Has this gotten better?

Yes, it seems to work quite well now.
I'm still using leo for production work
until I spend some time qualifying it.

> My experience with XST synthesis recently has been pretty good,
> so I'm debating about sticking with Xilinx for this next project
> or jumping to Altera since their Apex-II parts seem to fit my
> application a bit better.

That's a tough call.
If you want to reuse code Xilinx-only code I would stay.
If it's mostly new code, I would go.

-- Mike Treseler

Starting with Quartus II 2.2 Altera replaced their VHDL and Verilog HDL
synthesis front ends with the parsers from Verific www.verific.com , to
greatly improve the language coverage and the correctness of the synthesis
solution. With each subsequent release several improvements have been made
in improving the quality of the synthesis solution in Quartus, including
inferencing run times and optimizing the area versus fmax choices. The
Quartus synthesis solution is available as part of the free Quartus Web
Edition.

https://www.altera.com/support/softw.../quartus_we/dn
l-quartus_we.jsp

- Subroto Datta
Altera Corp.

"John Providenza" <[email protected]> wrote in message
news:[email protected] om...
> I'm looking at doing a design with Apex-II parts and will
> probably need to use the Verilog synthesizer that comes with
> Quartus. My last experience (multiple years ago) was very
> unpleasant - lots of synthesis bugs.
>
> Has this gotten better?
>
> My experience with XST synthesis recently has been pretty good,
> so I'm debating about sticking with Xilinx for this next project
> or jumping to Altera since their Apex-II parts seem to fit my
> application a bit better.
>
> Any goog/bad stories?
>
> Thanks!
>
> John Providenza

Followup to: <[email protected] >
By author: [email protected] (John Providenza)
In newsgroup: comp.arch.fpga
>
> I'm looking at doing a design with Apex-II parts and will
> probably need to use the Verilog synthesizer that comes with
> Quartus. My last experience (multiple years ago) was very
> unpleasant - lots of synthesis bugs.
>
> Has this gotten better?
>
> My experience with XST synthesis recently has been pretty good,
> so I'm debating about sticking with Xilinx for this next project
> or jumping to Altera since their Apex-II parts seem to fit my
> application a bit better.
>

I have recently used Altera's Cyclone device as well as supported a
legacy project with APEX20K. The recent versions of Quartus seem to
do quite well; 2.2SP2 was OK and 3.0 seems to be better.

That being said, I have found that at least the webpack versions of
both the Xilinx and Altera packages have simulations that are all but
unusable. It hasn't been a big deal for me as I have had access to
logic analyzers and have had debugging pins available on the board.

That being said, I doubt either of these tools would do a hugely good
job optimizing very complex "far from hardware" idioms.

-hpa
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