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12-13-2007, 09:00 PM
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`ifdef XST?
Does anybody know if XST defines any testable variables when compiling
verilog code? Some of the compilers or simulators that I'm using have differing $readmemh() semantics, and I'd like to be able to write something like: `ifdef INCA initial $readmemh("memory",configurations,0,15); `else `ifdef XST initial $readmemh("memory",configurations,0,15); `else initial $readmemh("memory",configurations); `endif `endif 
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12-14-2007, 03:27 PM
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Re: `ifdef XST?
On Dec 13, 12:00 pm, Neil Steiner <neil.stei...@vt.edu> wrote:
> Does anybody know if XST defines any testable variables when compiling > verilog code? > > Some of the compilers or simulators that I'm using have differing > $readmemh() semantics, and I'd like to be able to write something like: > > `ifdef INCA > initial $readmemh("memory",configurations,0,15); > `else > `ifdef XST > initial $readmemh("memory",configurations,0,15); > `else > initial $readmemh("memory",configurations); > `endif > `endif If you are using the GUI flow, the synthesis Properties page allows you to add defines. You may need to use the advanced properties page. Hope this helps. John Providenza
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