FPGA Central

hi,
how do we connect internals signals(not ports) of submodules in the
top level design to trigger ports of the ila core? With core inserter,
it is possible to connect signals from many submodules to the same
trigger port, but how is this done when you use core generater and
manually setup connections of icon and ila cores?

thank you.

Instantiate your ILA inside the submodule you want to instrument, there
is no reason why these have to be at the top level, you can have up to
15 ILA per chip. You'll have to string the control port down through
the hierarchy to the ILA but at least its only one port.

Alternatively, bus all the signals you want to watch into a single
instrumentation bus and bring that back up through the hierarchy to
your ILA instantiated atthe top level.


CMOS wrote:
> hi,
> how do we connect internals signals(not ports) of submodules in the
> top level design to trigger ports of the ila core? With core inserter,
> it is possible to connect signals from many submodules to the same
> trigger port, but how is this done when you use core generater and
> manually setup connections of icon and ila cores?
>
> thank you.

"CMOS" <[email protected]> wrote in message
news:[email protected] ups.com...
> hi,
> how do we connect internals signals(not ports) of submodules in the
> top level design to trigger ports of the ila core? With core inserter,
> it is possible to connect signals from many submodules to the same
> trigger port, but how is this done when you use core generater and
> manually setup connections of icon and ila cores?
>
> thank you.
>
You can get round this problem by using the Chipscope inserter. This method
allows you access to all the signals in the design and you don't need to add
anything to your source code.
HTH, Syms.