FPGA Central

Hi,

I need to implement a fairly simple Compact Flash Interface on a
Spartan 3 400.
The only thing it needs to do is write incoming data on the card,
nothing else.

I want to do this with a simple state machine, and
the rough plan for this looks like this:

1. Check status register (mustn't be busy or request data (bits 7 and
3 = 0))
2. write sector number and LBA address
3. write the "write sector" command
4. write data

I have problems with point 1.
The card works in trueIDE mode.
I wanted to start the whole thing in pio mode 1 to see if it works at
all,
and then find the max. speed for the cards (maybe 4).
Anyway, I follow the timings for trueide mode from the cf paper:

[url=http://img442.imageshack.us/my.php?image=timingsgw1.png]
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URL]

I checked the timings with modelsim (they are ok), and also with a
oscilloscope:

[url=http://img459.imageshack.us/my.php?image=osziscanik5.jpg]
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URL]

I monitored one of the address-signals to see when the address is
valid, and the iord-signal (low active).
My problem is, that I get bullshit from the registers.
I tried reading different registers, and here are some results
(with a small 16mb card and a big 2gb card):

feature register: 1111 1110 1000 0100 - FE84 - small
feature register: 0100 0000 0100 0000 - 4040 - big
Status register: 1111 1110 1000 0100 - FE84 - small
Status register: 0100 1000 0100 1000 - 4848 - big
LBA1: 0100 0000 0100 0000 - 4040 - big
0100 1000 0100 1000 - 4848 - groß 2nd turning on
LBA1: 1111 1110 1000 0100 - FE84 - small
Sector count: 0100 0000 0100 1000 - 4048 - big
Sector count: 0100 0000 0100 1100 - 404C - 2nd big
Sector count: 0000 0100 0000 0000 - 0400 - big next morning
Sector count: 1111 1110 1000 0100 - FE84 - small

As you can see, I get totally different values, and they don't seem to
make sense.
Here's my slightly cut code for the state machine.
This does only read the status register and show the results on some
led:

http://www.mikrocontroller.net/attachment/25436/CF_SM.vhd

Any help/hint is highly appreciated.

> Any help/hint is highly appreciated.

there is one simple generic hint:

before doing the VHDL statemachine etc, just connect the CF to
Microblaze GPIO and write simple C program that bit bangs the CF, when
that works on your board you know the HW connections are all ok, and
that you know the interface. when that works then proceed with VHDL
implementation

Antti

kron wrote:


> My problem is, that I get bullshit from the registers.

let's have a look at the synthesis warnings:

Warning: Design contains 34 input pin(s) that do not drive logic
Warning: No output dependent on input pin "START
Warning: No output dependent on input pin "RW_N
Warning: No output dependent on input pin "DATA_INPUT[0]
....
Warning: No output dependent on input pin "DATA_INPUT[31]

Consider running a vhdl sim to debug this controller.

-- Mike Treseler

This file is part of a bigger design which contains the ins and outs
to the pins.
I did work a lot with modelsim and built the whole timings nicely.
Any other ideas?
I don't have microblaze, so I can't use it.
Can I do sth. with picoblaze?