You don't ask for much, do you?
Tom Hawkins wrote:
>
> I need a single chip solution for a control system and DSP
> application.
The only hard part of your request is the single chip requirement. You
can get a lot of peripherals and memory embedded into an MCU, either
small and cheap or some fairly large and powerful. But not many (if
any) FPGAs have anything other than digital circuits. One exception is
the PSOC from Cypress. This is an MCU (don't remember the type, it is
either an 8051 derivative or a custom, 8 bit RISC chip) with
programmable peripheral blocks and memory. The peripherals can be
digital like a UART or analog like an ADC. If you only need 50 Hz and
not simultaneous, you can mux a single ADC. The programmable digital
blocks may be enough for your needs if combined with MCU code.
> The primary consideration is board area. The second, cost.
> Here's what I'm looking for:
> - 5V supply and I/O.
> - Embedded ADC (at least 1, preferably 8). Slow rate (50 Hz).
> - Small FPGA fabric. About the size of a small spartan.
> - Embedded block ram (4 KBytes).
> - Flash FPGA. Would like not to have separate config prom.
> - Low I/O count. I only need about 30 pins.
>
> Does anything like this exist? If 5V I/O is not possible, what's
> needed to translate about 12 pins from 3.3/1.2 to 5V?
I don't remember if the PSOC has 5 volt tolerant IOs. These have
largely disappeared from newer families of logic. There are several
ways to interface 3.3 volt IOs to 5 volt logic. It partly depends on
the nature of your 5 volt interface. If it is just TTL, then you likely
need to do nothing unless there is a chance the TTL levels will exceed
3.5 volts. Or you can use a bus switch driven from about 4 volt Vcc as
a voltage limiter. Or you can use a level shifter bus chip. The bus
chips come in 8 and 16 bit widths and some are very small packages.
If the PSOC does not float your boat, you will likely need a two chip
design, one for analog and one for
FPGA. You can get an MCU in either
chip along with the analog or
FPGA. There are Flash FPGAs such as the
Lattice XPLD devices. You didn't give a price target, but I got a quote
once on the 512 macrocell part under $20, IIRC.
Or if you get an MCU with analog IO, it will likely have enough Flash to
program one of the smaller FPGAs. May be cheaper than the Flash
FPGA.
You didn't say anything about power. Most FPGAs are pretty power
hungry. The CPLDs can be *very* low power. Both the Lattice parts and
the Xilinx Coolrunner parts can get way below 1 mA if not clocked at a
high rate.
> Also, what's envolved for FPGA based software defined radio? I'd like
> to build an RC (as in radio control airplane) receiver. Most FM
> radios hop between 2 frequencies to encode pulse widths which in turn
> drive the RC servos. So nothing digital. It just needs to extract
> the pulse train from the FM. I would consider trading an FM receiver
> chip for an external high-speed ADC and a larger FPGA if it buys
> enough flexibility.
It has been awhile since I have looked at digital radios, but if I am
still current, the term "software defined radio" implies the final
demodulation stage being done in software. The processing required for
a digital radio means a high speed ADC at the IF stage and dedicated
hardware for conversion to baseband. This can be done in an
FPGA, but
you are looking at a lot of power to make it work. This is likely way
overkill for your application. You would still need the RF part of the
receiver. Since an analog FM receiver is pretty much one chip, I don't
see how this would help you. I expect you will find digital receivers
are an advantage when you can share the IF stage between a lot of
downconverters and demodulators such as in a cell phone base station or
similar application.
--
Rick "rickman" Collins
rick.collins@XYarius.com
Ignore the reply address. To email me use the above address with the XY
removed.
Arius - A Signal Processing Solutions Company
Specializing in DSP and
FPGA design URL
http://www.arius.com
4 King Ave 301-682-7772 Voice
Frederick, MD 21701-3110 301-682-7666 FAX