FPGA Central - World's 1st FPGA / CPLD Portal

FPGA Central

World's 1st FPGA Portal

 

Go Back   FPGA Groups > NewsGroup > FPGA

FPGA comp.arch.fpga newsgroup (usenet)

Reply
 
LinkBack Thread Tools Display Modes
  #1 (permalink)  
Old 05-08-2004, 07:15 PM
LK Allen
Guest
 
Posts: n/a
Default Director of Applications/FPGA

If you know someone that would be interested, please forward my email.
Any help you can give me would be much appreciated. This position is
located in Silicon Valley(near Cisco's campus).



I answered some common questions below the job description, so please
take a moment to read them.

Director of Applications



You have a successful track record supporting ASIC and FPGA customers
with knowledge in HDL coding, synthesis, and P&R. You have expertise
at the device level in high-speed I/O, embedded memory, PLLs, and
multipliers. At the board level you are knowledgeable about
reference designs, device configuration, board integration, and signal
integrity. Work closely with the design engineering team to refine
product definition and ensure product usability. Run HDL designs on
the design platform, identify issues, collaborate with the development
team and drive resolution. Strong customer skills and contacts with
ability to demonstrate platforms and products, train customers,
understand their applications, and devise solutions during debug and
system bring-up. You will author handbooks and application notes to
promote adoption of our advanced products.



Successful candidate will be a skilled communicator who establishes
credibility with engineers, managers, and architects at customer sites
and at conferences.

He or she will lead by example and build a world class team.



Qualifications: BS/MS EE + 10 years experience in FPGA and ASIC
design/applications. Extensive experience in FPGA design, PCB issues
and customer interaction is required. Knowledge of Communications,
Storage, or Industrial vertical markets is a plus.



- How much funding have we received?

- Is there a second round in the near future? Has it been closed?



We closed on our first round in May 2003. We met our milestones for
developing a business plan, developing our software/simulation
platform, and proving 2x better capabilities with customer designs.



We closed our second round in April 2004. We have top-notch VCs

Sequoia Capital, USVP, and Horizon with semiconductor savvy general
partners sitting on our board.



- Why this company?



Programmable logic is booming, taking over a bigger and bigger
proportion of the semiconductor market. We have a breakthrough
architecture that allows programmable logic to do things that it has
never done before.


Regards,
LK Allen IV
[email protected]
[email protected]
Reply With Quote
Reply

Bookmarks

Thread Tools
Display Modes

Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

BB code is On
Smilies are On
[IMG] code is On
HTML code is Off
Trackbacks are On
Pingbacks are On
Refbacks are On


Similar Threads
Thread Thread Starter Forum Replies Last Post
Font requirements for patent applications Weng Tianxiang Verilog 2 11-07-2005 04:58 PM
transport applications Jacek Mocki FPGA 24 04-30-2004 07:36 PM
CFP: 7th Mil/Aerospace Applications of Programmable Logic Devices International Conference (MAPLD) Richard B. Katz Verilog 0 12-04-2003 07:08 AM


All times are GMT +1. The time now is 04:12 AM.


Powered by vBulletin® Version 3.8.0
Copyright ©2000 - 2012, Jelsoft Enterprises Ltd.
Search Engine Friendly URLs by vBSEO 3.2.0
Copyright 2008 @ FPGA Central. All rights reserved