On Jul 1, 3:04*pm, Brane2 <bran...@avtomatika.com> wrote:
> So far, I have only been able to find Spartan6 ( which isn't really
> available yet) from Xilinx *and some small FPGA from Actel ( Igloo
> family ?).
>
> Trouble is, Spartan has only two lanes, which is enough only for PCI-e
> x1.
> Actel had more lanes- AFAIK enough for PCI-e x4, but was very small.
>
> Is there anything else worth looking at ?
>
> I'm looking for chip with decent PCI-e interface ( say at least 8
> lanes for PCI-e x4 ) in the cost range $10-20 or so...
No Actel Igloo that I know of supports PCI-e in any shape or form. If
act, I'm not sure what Actel FPGA supports any form of multigigabit
serialization.
Consider looking at Altera Arria GX, which is in production, or Arria
II GX, which will be in production in the near future.
Your statement that Spartan-6 has only two lanes is incorrect;
although the integrated endpoint only supports one lane, there's
nothing stopping you from using all 8 transceivers in the design for
an 8 lane link. It just means you need to do a bit more work.
On Jul 2, 1:30*am, Nathan Bialke <nat...@bialke.com> wrote:
> On Jul 1, 3:04*pm, Brane2 <bran...@avtomatika.com> wrote:
>
> > So far, I have only been able to find Spartan6 ( which isn't really
> > available yet) from Xilinx *and some small FPGA from Actel ( Igloo
> > family ?).
>
> > Trouble is, Spartan has only two lanes, which is enough only for PCI-e
> > x1.
> > Actel had more lanes- AFAIK enough for PCI-e x4, but was very small.
>
> > Is there anything else worth looking at ?
>
> > I'm looking for chip with decent PCI-e interface ( say at least 8
> > lanes for PCI-e x4 ) in the cost range $10-20 or so...
>
> No Actel Igloo that I know of supports PCI-e in any shape or form. If
> act, I'm not sure what Actel FPGA supports any form of multigigabit
> serialization.
>
> Consider looking at Altera Arria GX, which is in production, or Arria
> II GX, which will be in production in the near future.
>
> Your statement that Spartan-6 has only two lanes is incorrect;
> although the integrated endpoint only supports one lane, there's
> nothing stopping you from using all 8 transceivers in the design for
> an 8 lane link. It just means you need to do a bit more work.
>
> - Nathan
Hi
cheap PCIe is still a problem, a 2 chip solution in price range $20 is
possible
but one chip one is harder
lattice promises 1K$LUT so ECP3-17 should be around 17$
altera has promised arria iiggx as low as 10$
but that the real life is still a little different, yesterday it
looked
that cheapes FPGA with PCIe cost 240$ ? (arria)
hm maybe some virtex is cheaper than arria
maybe s-6 changes this, and becomes first available AND cheap
FPGA with PCIe but it assumed still a year til that
Brane2 schrieb:
> So far, I have only been able to find Spartan6 ( which isn't really
> available yet) from Xilinx and some small FPGA from Actel ( Igloo
> family ?).
>
> Trouble is, Spartan has only two lanes, which is enough only for PCI-e
> x1.
> Actel had more lanes- AFAIK enough for PCI-e x4, but was very small.
>
> Is there anything else worth looking at ?
>
> I'm looking for chip with decent PCI-e interface ( say at least 8
> lanes for PCI-e x4 ) in the cost range $10-20 or so...
$10 - $20 is probably not that easy. Lattice ECP2M / ECP3M comes close
though. I have done three customer designs in the last year or so. Two
using ECP2M20 and one with ECP2M35. The Lattice web-shop lists a price
of about $50 for the ECP2M20 but you can probably do much better through
a distributor. I don't know exactly what price my customers are paying
but I have the sound impression that it's around or below €30. Lattice,
at least here in central Europe, give you very flexible IP licencing rates.
I also do local training for the Lattice PCIe core. I would estimate at
least a dozen of the course participants in the last two years have or
are in the process of using Lattice for their PCIe design. (x1 or x4
configurations)
The core isn't all that difficult to integrate. You just have to
understand how to build and decode PCIexpress packets. If you are
looking for direct attachment to Wishbone for instance or are in need of
a device driver, drop me a mail.
[email protected] wrote:
> cheap PCIe is still a problem, a 2 chip solution in price range $20 is
> possible
> but one chip one is harder
Getting to $20 range without external phy with pipe interface is almost
impossible currently I would say, even with big volumes. And x4 softcore
and user transaction logic takes considerable space from the FPGA.
> but that the real life is still a little different, yesterday it
> looked
> that cheapes FPGA with PCIe cost 240$ ? (arria)
> hm maybe some virtex is cheaper than arria
Everything depends on volumes... I would say that small V5LXT might be
the best match, using the PCIe hardcore to save space. Another option
depending on the schedule might be ArriaIIGX, it has also integrated
PCIe endpoint. S6 might not be that good match, because it has only x1
hard PCIe EP.
In the original message there is some kind of mixup, it speaks about 4x
PCIe, but 8 lanes, or did he want 2*4x PCIe. 4xPCIe with lowcost FPGAs
might also be quite challenging design.
>So far, I have only been able to find Spartan6 ( which isn't really
>available yet) from Xilinx and some small FPGA from Actel ( Igloo
>family ?).
>
>Trouble is, Spartan has only two lanes, which is enough only for PCI-e
>x1.
>Actel had more lanes- AFAIK enough for PCI-e x4, but was very small.
>
>Is there anything else worth looking at ?
>
>I'm looking for chip with decent PCI-e interface ( say at least 8
>lanes for PCI-e x4 ) in the cost range $10-20 or so...
What about buying a PCIe interface chip (say from PLX) and connecting that
chip to your FGPA? Using the chip is one less thing to design and debug.
-Dave Pollum
On Jul 2, 1:29*pm, Dave P <vze24...@verizon.net> wrote:
> On Wed, 1 Jul 2009 15:04:26 -0700 (PDT), Brane2 <bran...@avtomatika.com>
> wrote:
>
> >So far, I have only been able to find Spartan6 ( which isn't really
> >available yet) from Xilinx *and some small FPGA from Actel ( Igloo
> >family ?).
>
> >Trouble is, Spartan has only two lanes, which is enough only for PCI-e
> >x1.
> >Actel had more lanes- AFAIK enough for PCI-e x4, but was very small.
>
> >Is there anything else worth looking at ?
>
> >I'm looking for chip with decent PCI-e interface ( say at least 8
> >lanes for PCI-e x4 ) in the cost range $10-20 or so...
>
> What about buying a PCIe interface chip (say from PLX) and connecting that
> chip to your FGPA? *Using the chip is one less thing to design and debug.
> -Dave Pollum
Gennum also makes x1 and x4 interface chips. The PLX chip is actually
a MCM with a PCIE/PCI bridge and a PCI/local bridge.
You could also go with an IP core in a Spartan3, with an external PHY
chip.
On Jul 2, 1:29*pm, Dave P <vze24...@verizon.net> wrote:
> On Wed, 1 Jul 2009 15:04:26 -0700 (PDT), Brane2 <bran...@avtomatika.com>
> wrote:
>
> >So far, I have only been able to find Spartan6 ( which isn't really
> >available yet) from Xilinx *and some small FPGA from Actel ( Igloo
> >family ?).
>
> >Trouble is, Spartan has only two lanes, which is enough only for PCI-e
> >x1.
> >Actel had more lanes- AFAIK enough for PCI-e x4, but was very small.
>
> >Is there anything else worth looking at ?
>
> >I'm looking for chip with decent PCI-e interface ( say at least 8
> >lanes for PCI-e x4 ) in the cost range $10-20 or so...
>
> What about buying a PCIe interface chip (say from PLX) and connecting that
> chip to your FGPA? *Using the chip is one less thing to design and debug.
> -Dave Pollum
Last time I checked, the PLX chips were not under $20 either...
On Jul 2, 9:08*am, Kim Enkovaara <kim.enkova...@iki.fi> wrote:
> In the original message there is some kind of mixup, it speaks about 4x
> PCIe, but 8 lanes, or did he want 2*4x PCIe. 4xPCIe with lowcost FPGAs
> might also be quite challenging design.
Sorry.
My asumptions:
PCI-e x 1 =2 differential pairs ( 2x Rx + 2* Tx )
PCI-e x 4 = 8 differential pairs ( 4x Rx + 4* Tx )
1 lane = one differential pair
It seems from your question that i should count 1 PCI-e lane as 2
diff. pairs ( 1Rx + 1 Tx ) ?
On Jul 2, 12:30*am, Nathan Bialke <nat...@bialke.com> wrote:
> Your statement that Spartan-6 has only two lanes is incorrect;
> although the integrated endpoint only supports one lane, there's
> nothing stopping you from using all 8 transceivers in the design for
> an 8 lane link. It just means you need to do a bit more work.
I was under the impression that there are only enough fast serial I/O
pins on the chip for PCI-e x1 ...