FPGA Central

hi folks ... when using the Cyclones with the EPCS4 flash
configuration chip and active serial mode ... I'd like to use the
extra memory space to store a memory image ... so all I need to do is
read or write it in a big block .. so yes i have done this with Nios
but this is too much overhead in a small cyclone device simply to copy
an image from the flash to an external ram .. anyone know how to read
the flash without using nios ? kb

Khim Bittle wrote:
> hi folks ... when using the Cyclones with the EPCS4 flash
> configuration chip and active serial mode ... I'd like to use the
> extra memory space to store a memory image ... so all I need to do is
> read or write it in a big block .. so yes i have done this with Nios
> but this is too much overhead in a small cyclone device simply to copy
> an image from the flash to an external ram .. anyone know how to read
> the flash without using nios ? kb
>
>
Hi Khim,
As I understand things, the Altera flash memory devices are based upon
standard serial flash devices (ST microelectronics ?). Hence you would
program these devices as you would any normal serial memory device. You
only have yo be careful that you do not overwrite your configuration data.

The Altera Cyclone data sheets have the relevant information you are
looking, including the memory maps of the configuration and user spaces.

Ben

Ben Popoola <[email protected]> wrote in message news:<wBoQb.11$[email protected]>...
> Khim Bittle wrote:
> > hi folks ... when using the Cyclones with the EPCS4 flash
> > configuration chip and active serial mode ... I'd like to use the
> > extra memory space to store a memory image ... so all I need to do is
> > read or write it in a big block .. so yes i have done this with Nios
> > but this is too much overhead in a small cyclone device simply to copy
> > an image from the flash to an external ram .. anyone know how to read
> > the flash without using nios ? kb
> >
> Hi Khim,
> As I understand things, the Altera flash memory devices are based upon
> standard serial flash devices (ST microelectronics ?). Hence you would
> program these devices as you would any normal serial memory device. You
> only have yo be careful that you do not overwrite your configuration data.

EPCS1 == M25P10
EPCS4 == M25P40

standard serial flash from www.st.com
altera is only ordering them them with custom lables printed

the problem accessing the config memory from non-nios applications is that
quartus doesnt allow assignments to pins DATA0 and DCLK so it is not
possible to access the config flash memory.

there must be some internal trick that altera software uses but this
seems to be "Altera undocumented"

Antti Lukats
xilin.openchip.org

> > Hi Khim,
> > As I understand things, the Altera flash memory devices are based upon
> > standard serial flash devices (ST microelectronics ?). Hence you would
> > program these devices as you would any normal serial memory device. You
> > only have yo be careful that you do not overwrite your configuration
data.
>
> EPCS1 == M25P10
> EPCS4 == M25P40
>
> standard serial flash from www.st.com
> altera is only ordering them them with custom lables printed


Antti, any idea what the relative cost of the ST part is?

Altera say they've developed the AS devices for low cost
configuration, but low quantity prices for the EPCS4 in the
UK are £8 ish, not what I'd call cheap.


Nial Stewart

------------------------------------------------
Nial Stewart Developments Ltd
FPGA and High Speed Digital Design
www.nialstewartdevelopments.co.uk

"Nial Stewart" <[email protected]> wrote in message
news:40194a7e$0$18492$[email protected]. .
> > > Hi Khim,
> > > As I understand things, the Altera flash memory devices are based upon
> > > standard serial flash devices (ST microelectronics ?). Hence you
would
> > > program these devices as you would any normal serial memory device.
You
> > > only have yo be careful that you do not overwrite your configuration
> data.
> >
> > EPCS1 == M25P10
> > EPCS4 == M25P40
> >
> > standard serial flash from www.st.com
> > altera is only ordering them them with custom lables printed
>
>
> Antti, any idea what the relative cost of the ST part is?
>
> Altera say they've developed the AS devices for low cost
> configuration, but low quantity prices for the EPCS4 in the
> UK are £8 ish, not what I'd call cheap.


OK, so I got off my own arse and looked up the prices.

DigikeyUK list them at £2.93 one off, down to £1.44 for 1000,
they're probably cheaper in the States.

Time to spend a bit of time perusing data sheets I think.

Writing Altera's logo on them must be expensive :-(


Nial

------------------------------------------------
Nial Stewart Developments Ltd
FPGA and High Speed Digital Design
www.nialstewartdevelopments.co.uk

On 28 Jan 2004 23:43:35 -0800, [email protected] (Antti Lukats)
wrote:

>Ben Popoola <[email protected]> wrote in message news:<wBoQb.11$[email protected]>...
>> Khim Bittle wrote:
>> > hi folks ... when using the Cyclones with the EPCS4 flash
>> > configuration chip and active serial mode ... I'd like to use the
>> > extra memory space to store a memory image ... so all I need to do is
>> > read or write it in a big block .. so yes i have done this with Nios
>> > but this is too much overhead in a small cyclone device simply to copy
>> > an image from the flash to an external ram .. anyone know how to read
>> > the flash without using nios ? kb
>> >
>> Hi Khim,
>> As I understand things, the Altera flash memory devices are based upon
>> standard serial flash devices (ST microelectronics ?). Hence you would
>> program these devices as you would any normal serial memory device. You
>> only have yo be careful that you do not overwrite your configuration data.
>
>EPCS1 == M25P10
>EPCS4 == M25P40
>
>standard serial flash from www.st.com
>altera is only ordering them them with custom lables printed
>
>the problem accessing the config memory from non-nios applications is that
>quartus doesnt allow assignments to pins DATA0 and DCLK so it is not
>possible to access the config flash memory.
>

thanks for the response , you are correct , the problem is not how the
memory chips work but how to manipulate dclk/data0 without nios ... (
i don't think quartus will let me at them ?) ... i haven't given up
yet .. KB

[email protected] (Khim Bittle) wrote in message
> >> Khim Bittle wrote:
> >> > hi folks ... when using the Cyclones with the EPCS4 flash
> >> > configuration chip and active serial mode ... I'd like to use the
> >> > extra memory space to store a memory image ... so all I need to do is
[snip]
> thanks for the response , you are correct , the problem is not how the
> memory chips work but how to manipulate dclk/data0 without nios ... (
> i don't think quartus will let me at them ?) ... i haven't given up
> yet .. KB

http://wiki.openchip.org/index.php/ASMI

instantiating ASMI Block from VHDL code
Antti
xilinx.openchip.org

Khim Bittle wrote:

> thanks for the response , you are correct , the problem is not how the
> memory chips work but how to manipulate dclk/data0 without nios ... (
> i don't think quartus will let me at them ?) ... i haven't given up
> yet .. KB
>
>

If you have a pre-made board then I can see how this can be a problem.
However if you are developing a custom board it is not two difficult to
multiplex the dclk/data0 pins with user I/O pins to have full control
over the serial memory devices.

Ben Popoola <[email protected]> wrote in message news:<bvftk5$s0mpb$[email protected]>...
> Khim Bittle wrote:
>
> > thanks for the response , you are correct , the problem is not how the
> > memory chips work but how to manipulate dclk/data0 without nios ... (
> > i don't think quartus will let me at them ?) ... i haven't given up
> > yet .. KB
>
> If you have a pre-made board then I can see how this can be a problem.
> However if you are developing a custom board it is not two difficult to
> multiplex the dclk/data0 pins with user I/O pins to have full control
> over the serial memory devices.

Ben there is no need to modify the board, see my posting a special
cyclone primitive "amsiblock" can be instantiated and that gives
full control as needed to read write the config memory. no separate
wiring needed

Antti

Antti Lukats wrote:
> Ben Popoola <[email protected]> wrote in message news:<bvftk5$s0mpb$[email protected]>...
>
>>Khim Bittle wrote:
>>
>>
>>>thanks for the response , you are correct , the problem is not how the
>>>memory chips work but how to manipulate dclk/data0 without nios ... (
>>>i don't think quartus will let me at them ?) ... i haven't given up
>>>yet .. KB
>>
>>If you have a pre-made board then I can see how this can be a problem.
>>However if you are developing a custom board it is not two difficult to
>>multiplex the dclk/data0 pins with user I/O pins to have full control
>>over the serial memory devices.
>
>
> Ben there is no need to modify the board, see my posting a special
> cyclone primitive "amsiblock" can be instantiated and that gives
> full control as needed to read write the config memory. no separate
> wiring needed
>
> Antti

I have now seen your posting and you are right. However, how widely
available is this information?

Ben

On 29 Jan 2004 21:54:31 -0800, [email protected] (Antti Lukats)
wrote:

>[email protected] (Khim Bittle) wrote in message
>> >> Khim Bittle wrote:
>> >> > hi folks ... when using the Cyclones with the EPCS4 flash
>> >> > configuration chip and active serial mode ... I'd like to use the
>> >> > extra memory space to store a memory image ... so all I need to do is
>[snip]
>> thanks for the response , you are correct , the problem is not how the
>> memory chips work but how to manipulate dclk/data0 without nios ... (
>> i don't think quartus will let me at them ?) ... i haven't given up
>> yet .. KB
>
>http://wiki.openchip.org/index.php/ASMI
>
>instantiating ASMI Block from VHDL code
>Antti
>xilinx.openchip.org

antti ... thanks for the link , KB

On Sat, 31 Jan 2004 09:59:59 +0000, Ben Popoola
<[email protected]> wrote:

>Khim Bittle wrote:
>
>> thanks for the response , you are correct , the problem is not how the
>> memory chips work but how to manipulate dclk/data0 without nios ... (
>> i don't think quartus will let me at them ?) ... i haven't given up
>> yet .. KB
>>
>>
>
>If you have a pre-made board then I can see how this can be a problem.
>However if you are developing a custom board it is not two difficult to
>multiplex the dclk/data0 pins with user I/O pins to have full control
>over the serial memory devices.
>

yes my fall back plan was to use two additional pins ... but for the
smaller cost critical cyclone designs using the 144 pins package I/O
pins are gold and not having to waste two pins is a big deal to me ...
thanks anyway, regards, KB

"Ben Popoola" <[email protected]> wrote in message
news:bvgj7v$sbhnf$[email protected]..

> > Ben there is no need to modify the board, see my posting a special
> > cyclone primitive "amsiblock" can be instantiated and that gives
> > full control as needed to read write the config memory. no separate
> > wiring needed
> >
> > Antti
>
> I have now seen your posting and you are right. However, how widely
> available is this information?

it is available to ANYONE who has installed Quartus on their machine
just look at the libraries - I needed some 30 minutes to "derive" this
information.
as I dont have any Cyclone device or board, I can not verify in the hardware
what the asmiblock ports actually do, but this is the way NIOS does it, and
it is available for user logic, so it should be used.

A promise - if any one is kind to support openchip with Cyclone target board
I will instantly check it out how to access the ASMI port from user logic
and
publish this information, keeping special "thanks" notice to the donator of
the
board - dallaslogic are you listening ?

ok, promise is promise, I possible do it sooner or later, if I dont have
board
handy then possible later as I have some other things also in que.

antti

> > I have now seen your posting and you are right. However, how widely
> > available is this information?
> it is available to ANYONE who has installed Quartus on their machine
> just look at the libraries - I needed some 30 minutes to "derive" this
> information.
> as I dont have any Cyclone device or board, I can not verify in the
hardware
> what the asmiblock ports actually do, but this is the way NIOS does it,
and
> it is available for user logic, so it should be used.
> A promise - if any one is kind to support openchip with Cyclone target
board
> I will instantly check it out how to access the ASMI port from user logic
> and
> publish this information, keeping special "thanks" notice to the donator
of
> the
> board - dallaslogic are you listening ?
> ok, promise is promise, I possible do it sooner or later, if I dont have
> board
> handy then possible later as I have some other things also in que.
> antti

Well found Antti, I had a good dig around Quartus and the
SOPC installation and missed this.

I also asked an Altera FAE could this be done, he checked with the States
and
the answer was...


"Response from Altera is-
No the only ASMI component that we have contains an Avalon interface. You
could copy the asmi VHDL component from a Nios project to a new project
that does not contain a Nios core and the customer could access the
component
with their own logic. However, this is not supported by Altera and the
customer would need to do this at their own risk"


If the cyclone_asmiblock works it'll be much simpler than what they've
suggested.

I'll try it on my Cyclone PCI board if I get time, but that's not
likely to be in the next week or two.


Good work.

Nial

------------------------------------------------
Nial Stewart Developments Ltd
FPGA and High Speed Digital Design
Cyclone based 'Easy PCI' proto board
www.nialstewartdevelopments.co.uk