FPGA Central

Currently I am trying to design an equalizer based on variable step siz
(VSS) NLMS algorithm. The adaptation of the step size is based on th
instataneous squared error. The number of taps is 55. My initial step siz
(which is also equivalent to max. step size allowable) is 0.6 and th
minimum step size allowable is 0.35, with the "Alpha" = 0.97, "Gamma"
0.0005. I compare it to the conventional NLMS algorithm with the same ta
length and step size of 0.4 It is found that both algorithms achiev
similar steady state error but the conventional NLMS algorithm still ca
achieve faster speed as compared to the VSS NLMS. What is the proble
actually? Anything wrong with the setting of maximum step size, Alpha an
Gamma? Can anyone please help? Many thanks.

Richard_K wrote:
> Currently I am trying to design an equalizer based on variable step size
> (VSS) NLMS algorithm. The adaptation of the step size is based on the
> instataneous squared error. The number of taps is 55. My initial step size
> (which is also equivalent to max. step size allowable) is 0.6 and the
> minimum step size allowable is 0.35, with the "Alpha" = 0.97, "Gamma" =
> 0.0005. I compare it to the conventional NLMS algorithm with the same tap
> length and step size of 0.4 It is found that both algorithms achieve
> similar steady state error but the conventional NLMS algorithm still can
> achieve faster speed as compared to the VSS NLMS. What is the problem
> actually? Anything wrong with the setting of maximum step size, Alpha and
> Gamma?

Those are the wrong questions. The right questions are what has to be
accomplished as the result and if and why VSS can help it.

Can anyone please help? Many thanks.

I was always wondering why peolpe are jerking Matlab instead of reading
books.

VLV

I found out that my step size keep varying around the initial step size
that I set. Can I anyone please help?




>Currently I am trying to design an equalizer based on variable step size
>(VSS) NLMS algorithm. The adaptation of the step size is based on the
>instataneous squared error. The number of taps is 55. My initial ste
size
>(which is also equivalent to max. step size allowable) is 0.6 and the
>minimum step size allowable is 0.35, with the "Alpha" = 0.97, "Gamma" =
>0.0005. I compare it to the conventional NLMS algorithm with the sam
tap
>length and step size of 0.4 It is found that both algorithms achieve
>similar steady state error but the conventional NLMS algorithm still can
>achieve faster speed as compared to the VSS NLMS. What is the problem
>actually? Anything wrong with the setting of maximum step size, Alph
and
>Gamma? Can anyone please help? Many thanks.
>