FPGA Central

Hi all,

I'm very new to DSP world. I'm using TMS320F2812 for my project and the
C5TRIP pin is connected with a one of the key. I need when the particular
key is pressed it should generate an interrupt (PDPINTB Interrupt). But in
my case i triggers the PDPINTB interrupt for whole time the C5TRIP is low
even i cleared the interrupt flag inside the ISR.

What would be the reason? Is TMS320F2812 design such that it continuously
generates PDPINTB when C5TRIP is low?

Thanks,
Regards,
Sumraj

sumraj wrote:
> Hi all,
>
> I'm very new to DSP world. I'm using TMS320F2812 for my project and the
> C5TRIP pin is connected with a one of the key. I need when the particular
> key is pressed it should generate an interrupt (PDPINTB Interrupt).

What a strange setup.

> But in
> my case i triggers the PDPINTB interrupt for whole time the C5TRIP is low
> even i cleared the interrupt flag inside the ISR.

Of course. IIRC PDPINTB is active low.

> What would be the reason? Is TMS320F2812 design such that it continuously
> generates PDPINTB when C5TRIP is low?

It is a strange idea to use event manager and power drive protection to
service a keypad.


Vladimir Vassilevsky
DSP and Mixed Signal Design Consultant
http://www.abvolt.com

Un bel giorno sumraj digitò:

> What would be the reason? Is TMS320F2812 design such that it continuously
> generates PDPINTB when C5TRIP is low?

Yes, PDPINTx are level-sensitive, not edge-sensitive. PDP stands for "power
drive protection"; they are designed to handle emergency situations, that's
why they are still active at the deepest low power modes and also disable
the PWM outputs when asserted.

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