FPGA Central - World's 1st FPGA / CPLD Portal

FPGA Central

World's 1st FPGA Portal

 

Go Back   FPGA Groups > NewsGroup > DSP

DSP comp.dsp newsgroup, mailing list

Reply
 
LinkBack Thread Tools Display Modes
  #1 (permalink)  
Old 10-01-2004, 10:58 PM
Country Loon
Guest
 
Posts: n/a
Default Sigma Delta Modulator Question

I am simulating a Sigma Delta Modulator - a basic one to begin with.
I have a digital integrator (1/1-z^-1) followed by a quantiser which goes
+/- 1 and then a delay z^-1 in the feedback path and a summing junction (-ve
feedback of course!) with the input. It appears to work as I can filter the
output and get the signal back but I am interested in the quantisation
noise. When I take the spectrum of the quantiser (just a hard limiter that
goes +1 or -1) I get the signal there ok but no quantisation noise.
What over sampling rate should I be using? I was looking in books and they
all show the quantisation noise clearly + the signal but I only have signal.
Is there something missing in my simulation? I am supposing that I do not
add noise (it is a clean signal) as the noise is generated by the
quantisation process.

Thanks

Tom


Reply With Quote
  #2 (permalink)  
Old 10-02-2004, 11:25 AM
Randy Yates
Guest
 
Posts: n/a
Default Re: Sigma Delta Modulator Question

"Country Loon" <[email protected]> writes:

> I am simulating a Sigma Delta Modulator - a basic one to begin with.
> I have a digital integrator (1/1-z^-1) followed by a quantiser which goes
> +/- 1 and then a delay z^-1 in the feedback path and a summing junction (-ve
> feedback of course!) with the input. It appears to work as I can filter the
> output and get the signal back but I am interested in the quantisation
> noise. When I take the spectrum of the quantiser (just a hard limiter that
> goes +1 or -1) I get the signal there ok but no quantisation noise.
> What over sampling rate should I be using? I was looking in books and they
> all show the quantisation noise clearly + the signal but I only have signal.
> Is there something missing in my simulation? I am supposing that I do not
> add noise (it is a clean signal) as the noise is generated by the
> quantisation process.
>
> Thanks
>
> Tom


Hi Tom,

Several things:

1. You can easily compute the quantization noise. If the
input to the modulator is x and the output y, then the quantization
noise (of the modulator) is q = y - x. The signal output y = x + q,
so if you're looking at the spectrum of the output, you're looking
at X(w) + Q(w).

2. What kind of signal are you inputting to the modulator?
If you have something simple like DC, the quantization noise may not
be what you expect.

3. The modulator when used as part of a converter (and not simply
as a stand-alone noise-shaper) operates at the oversampling ratio M
times the effective or "baseband" sample rate Fs. The
oversampling ratio is chosen based on the performance (i.e., number
of bits) required in the converter and the order of the modulator.

4. You can dither the modulator, but not like you think. You don't want
to add the dither to the input x to the modulator. Rather, you add it
just in front of the quantizer. This is not done just to measure the
modulator (although it is useful for that since if you put zero into
a modulator so-dithered, the output is the shaped noise spectrum) but
primarily to decorrelate delta-sigma quantization artifacts like birdies
and limit cycles.

--Randy


--
% Randy Yates % "Rollin' and riding and slippin' and
%% Fuquay-Varina, NC % sliding, it's magic."
%%% 919-577-9882 %
%%%% <[email protected]> % 'Living' Thing', *A New World Record*, ELO
http://home.earthlink.net/~yatescr
Reply With Quote
  #3 (permalink)  
Old 10-04-2004, 08:49 AM
Country Loon
Guest
 
Posts: n/a
Default Re: Sigma Delta Modulator Question


"Country Loon" <[email protected]> wrote in message
news:1096664318.792549@ftpsrv1...
> I am simulating a Sigma Delta Modulator - a basic one to begin with.
> I have a digital integrator (1/1-z^-1) followed by a quantiser which goes
> +/- 1 and then a delay z^-1 in the feedback path and a summing junction

(-ve
> feedback of course!) with the input. It appears to work as I can filter

the
> output and get the signal back but I am interested in the quantisation
> noise. When I take the spectrum of the quantiser (just a hard limiter

that
> goes +1 or -1) I get the signal there ok but no quantisation noise.
> What over sampling rate should I be using? I was looking in books and they
> all show the quantisation noise clearly + the signal but I only have

signal.
> Is there something missing in my simulation? I am supposing that I do not
> add noise (it is a clean signal) as the noise is generated by the
> quantisation process.
>
> Thanks
>
> Tom
>
>

Thanks I think I can see the noise now - I used a dB scale and there it was!
(silly mistake). I like your idea of injecting dither and looking at the
noise shaped spectrum - thanks for that one. One more question (or two). In
real Sigma-Delta modulators are the integrators analogue or digital? Reason
I am asking is that I have read about saturation of the integrator
amplifiers and that suggests analogue.
Another question is about the dynamic range of the converter - my quantise
goes +/-1 - so what is the range of input I can have - is it just less than
1?

Thanks

Tom


Reply With Quote
Reply

Bookmarks

Thread Tools
Display Modes

Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

BB code is On
Smilies are On
[IMG] code is On
HTML code is Off
Trackbacks are On
Pingbacks are On
Refbacks are On


Similar Threads
Thread Thread Starter Forum Replies Last Post
Delta sigma Modulator Interface Marco T. FPGA 0 07-23-2006 06:43 PM
Functioning of a second order Sigma delta modulator Kavita DSP 4 06-05-2004 12:36 PM
Second order delta-sigma modulator. How? Symon DSP 11 04-25-2004 03:55 AM
Architecture for Low voltage, High Speed, Switched-Capacitor Sigma-Delta modulator. boki DSP 0 10-29-2003 09:44 AM
stability of multibit sigma-delta modulator Alexey Borodenkov DSP 1 08-26-2003 03:10 PM


All times are GMT +1. The time now is 02:31 AM.


Powered by vBulletin® Version 3.8.0
Copyright ©2000 - 2012, Jelsoft Enterprises Ltd.
Search Engine Friendly URLs by vBSEO 3.2.0
Copyright 2008 @ FPGA Central. All rights reserved