FPGA Central - World's 1st FPGA / CPLD Portal

FPGA Central

World's 1st FPGA Portal

 

Go Back   FPGA Groups > NewsGroup > DSP

DSP comp.dsp newsgroup, mailing list

Reply
 
LinkBack Thread Tools Display Modes
  #1 (permalink)  
Old 06-22-2009, 08:18 AM
HyeeWang
Guest
 
Posts: n/a
Default random length FFT implementation

Any random length FFT algorithm can work? Here I am emphasizing a
FAST algo and implementation other than ordinary DFT. Where can I
download such a FAST FFT algo and implementation (c or matlab)?

HyeeWang
Reply With Quote
  #2 (permalink)  
Old 06-22-2009, 09:30 AM
Rune Allnor
Guest
 
Posts: n/a
Default Re: random length FFT implementation

On 22 Jun, 09:18, HyeeWang <hyeew...@gmail.com> wrote:
> Any random length FFT algorithm can work? *Here I am emphasizing a
> FAST algo and implementation other than ordinary DFT. Where can I
> download such a FAST FFT algo and implementation (c or matlab)?


www.fftw.org/ is a link that is often mentioned when these
questions come up.

Rune
Reply With Quote
Reply

Bookmarks

Thread Tools
Display Modes

Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

BB code is On
Smilies are On
[IMG] code is On
HTML code is Off
Trackbacks are On
Pingbacks are On
Refbacks are On


Similar Threads
Thread Thread Starter Forum Replies Last Post
How do I optimize filter coefficient bit length and signal bit length? From Sweden FPGA 1 05-20-2008 08:55 PM
How do I optimize filter coefficient bit length and signal bit length? From Sweden DSP 1 05-20-2008 08:55 PM
Odd length Hilbert FIR Implementation Al Clark DSP 18 03-09-2006 02:10 AM
Relationship between Fibonacci and Galois Implementation of Maximal Length Sequences Sastry DSP 2 05-20-2005 01:21 AM
Abnormal routing behavior for Active Module implementation and bitstream length. Kelvin @ SG FPGA 0 02-05-2004 11:27 AM


All times are GMT +1. The time now is 12:06 AM.


Powered by vBulletin® Version 3.8.0
Copyright ©2000 - 2010, Jelsoft Enterprises Ltd.
Search Engine Friendly URLs by vBSEO 3.2.0
Copyright 2008 @ FPGA Central. All rights reserved