Im working on an
FPGA implementation of an ITU J.83 Annex A
modulator; I know this is kind of re-inventing the wheel . . . but I
wanted to see if I could do it. Well Ive finished the modulator and
its working great with our demodulator for 16QAM, 32QAM, and 128QAM.
What I cant figure out is that for 64QAM and 256QAM I cant get our
demodulator (based on Broadcoms BCM3510 chip) to achieve FEC lock. I
can get QAM lock and an MER above 40dB, but thats it.
So finally to my question . . . Im wondering if any of you remember
any special cases surrounding 64QAM or 256QAM in the modulation
process. The ITU J.83 and the DVB-C spec dont seem to mention any,
but maybe I missed something? Im feeding the modulator with MPEG
null packets, so one thing Im suspecting is that the BCM3510
demodulator wont work on 64QAM and 256QAM with MPEG null packets, but
Im having a hard time believing it since its happy with them for 16,
32, and 128QAM. Ive also double checked my constellation mapping
with the specs and they match what the spec says, Im hoping the specs
dont have a typo :-).
Any help or guidance you can give me would be greatly appreciated.
Thanks
Brett