FPGA Central - World's 1st FPGA / CPLD Portal

FPGA Central

World's 1st FPGA Portal

 

Go Back   FPGA Groups > NewsGroup > DSP

DSP comp.dsp newsgroup, mailing list

Reply
 
LinkBack Thread Tools Display Modes
  #1 (permalink)  
Old 02-13-2004, 01:10 PM
domistep
Guest
 
Posts: n/a
Default How to manage several acqusitions on TMS320

HEre is my question ...
I have 20 acquistions to realise on a TMS320F28xx (100 Mips)
The sample rate is 1khz.

If i don t use the ADC of the TMS230F28xx ,
Is it possible to use 20 external ADC linked with the TMS320 with SPI ?
But especially, is the GPIO Mux able to manage silmunatous input acquisition?
Or do i have to use a time delay between 2 acquistions?

Thank you
Reply With Quote
  #2 (permalink)  
Old 02-15-2004, 07:06 PM
r_obert@REMOVE_THIS.hotmail.com
Guest
 
Posts: n/a
Default Re: How to manage several acqusitions on TMS320

X-No-Archive: Yes

[email protected] (domistep) wrote:

>HEre is my question ...
>I have 20 acquistions to realise on a TMS320F28xx (100 Mips)
>The sample rate is 1khz.
>
>If i don t use the ADC of the TMS230F28xx ,
>Is it possible to use 20 external ADC linked with the TMS320 with SPI ?
>But especially, is the GPIO Mux able to manage silmunatous input acquisition?
>Or do i have to use a time delay between 2 acquistions?


I would think that you would need some sort of multiplexer
arrangement, where you are running the ADC's into the inputs of
multiplexer, and then the TMS is used to sample it's output. An
additional port on the TMS can be used to change the multiplexer
settings, to select the different ADC to be connected to the
multiplexer output.

Robert

www.gldsp.com

( modify address for return email )

www.numbersusa.com
www.americanpatrol.com
Reply With Quote
Reply

Bookmarks

Thread Tools
Display Modes

Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

BB code is On
Smilies are On
[IMG] code is On
HTML code is Off
Trackbacks are On
Pingbacks are On
Refbacks are On


Similar Threads
Thread Thread Starter Forum Replies Last Post
How to manage user 'reset' for post-synthesis simulation pasacco FPGA 1 08-03-2005 04:50 AM
Best Practices to Manage Complexity in Hardward/Software Design? [email protected] FPGA 128 08-01-2005 07:26 PM
TI TMS320 DSP as a soft-processor in FPGA? Bruno Cardeira FPGA 0 06-05-2005 07:49 PM
Problem using TI DMC Lib on TMS320 F2812 Andi Wenzel DSP 0 01-26-2004 11:25 AM
TMS320 Embedded PAL -> RGP converter Chris DSP 0 10-02-2003 11:10 PM


All times are GMT +1. The time now is 02:03 AM.


Powered by vBulletin® Version 3.8.0
Copyright ©2000 - 2012, Jelsoft Enterprises Ltd.
Search Engine Friendly URLs by vBSEO 3.2.0
Copyright 2008 @ FPGA Central. All rights reserved