FPGA Central - World's 1st FPGA / CPLD Portal

FPGA Central

World's 1st FPGA Portal

 

Go Back   FPGA Groups > NewsGroup > DSP

DSP comp.dsp newsgroup, mailing list

Reply
 
LinkBack Thread Tools Display Modes
  #1 (permalink)  
Old 02-24-2006, 06:11 AM
Allen
Guest
 
Posts: n/a
Default Gardner TED - sampling issue

Dear all,

I read the thread started by rider
two questions
1. what will happen to Gardner TED if I give it 10 sample per symbo
instead 2 sample per symbol ?


2. if i want to down sample from 10 => 2
where should i put the decimator
i suggest to put in front of interpolator instead of TED
what do you think


my TRL system
input => decimator => interpolator => TED => NCO => interpolator


thank you for your time
Reply With Quote
  #2 (permalink)  
Old 02-24-2006, 10:58 AM
Steve Underwood
Guest
 
Posts: n/a
Default Re: Gardner TED - sampling issue

Allen wrote:
> Dear all,
>
> I read the thread started by rider
> two questions
> 1. what will happen to Gardner TED if I give it 10 sample per symbol
> instead 2 sample per symbol ?
>
>
> 2. if i want to down sample from 10 => 2
> where should i put the decimator
> i suggest to put in front of interpolator instead of TED
> what do you think
>
>
> my TRL system
> input => decimator => interpolator => TED => NCO => interpolator
>
>
> thank you for your time
>

There is no need to decimate. If you have 10 samples per symbol, just
use every 5th sample for the Gardner algorithm.

Regards,
Steve
Reply With Quote
Reply

Bookmarks

Thread Tools
Display Modes

Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

BB code is On
Smilies are On
[IMG] code is On
HTML code is Off
Trackbacks are On
Pingbacks are On
Refbacks are On


Similar Threads
Thread Thread Starter Forum Replies Last Post
Trace performance of Gardner TED aming DSP 0 10-26-2005 01:08 PM
Gardner TED and intepolator Rajenish_jain DSP 0 10-05-2005 07:28 AM
Polynomial interpolation and Gardner TED Vahleos DSP 1 05-26-2005 02:31 PM
Gardner TED rider DSP 8 04-22-2004 12:07 PM
Gardner/Mueller Symbol Recovery for QAM Kevin Neilson DSP 1 01-27-2004 08:53 AM


All times are GMT +1. The time now is 10:47 AM.


Powered by vBulletin® Version 3.8.0
Copyright ©2000 - 2010, Jelsoft Enterprises Ltd.
Search Engine Friendly URLs by vBSEO 3.2.0
Copyright 2008 @ FPGA Central. All rights reserved