FPGA Central

Hi,


I have a C6711 DSP and am running a encoder/decoder using the audio
example of TI. I need to set the sample rate to the lowest possible
value. I nthe documentation is mentioned that it is possible to reduce
the internal clock rate to the factor N*256. I can set 1-256 in the
DSP/Bios tool (sample rate generator). Thus my question is, is this
the right place? and where can I set the N value? Shouldn't it be
possible to set the sanple rate to 8KHz or s.th.?


regards Hendrik Greving

On 16 Dec 2003 02:55:25 -0800, [email protected] (H.Greving) wrote:

>Hi,
>
>
>I have a C6711 DSP and am running a encoder/decoder using the audio
>example of TI. I need to set the sample rate to the lowest possible
>value. I nthe documentation is mentioned that it is possible to reduce
>the internal clock rate to the factor N*256. I can set 1-256 in the
>DSP/Bios tool (sample rate generator). Thus my question is, is this
>the right place? and where can I set the N value? Shouldn't it be
>possible to set the sanple rate to 8KHz or s.th.?

I think perhaps you are getting confused between the sample rate of
the McBSP and the sample rate of the codec. On the C6711 DSK the Codec
is fed by a 4.096MHz clock. According to
http://focus.ti.com/lit/ds/symlink/tlc320ad535.pdf (section 3.1) the
codec's sampling rate is XX_MCLK/512, which works out at 8khz.

As far as I remember, in the audio example the McBSP is driven by the
interrupt from the Codec, so it isn't essential for the McBSP to be
set to sample at a very low rate.

Is this of any help?

Best Regards
John McCabe

To reply by email replace 'nospam' with 'assen'

John McCabe wrote:

> On 16 Dec 2003 02:55:25 -0800, [email protected] (H.Greving) wrote:
>
>>Hi,
>>
>>
>>I have a C6711 DSP and am running a encoder/decoder using the audio
>>example of TI. I need to set the sample rate to the lowest possible
>>value. I nthe documentation is mentioned that it is possible to reduce
>>the internal clock rate to the factor N*256. I can set 1-256 in the
>>DSP/Bios tool (sample rate generator). Thus my question is, is this
>>the right place? and where can I set the N value? Shouldn't it be
>>possible to set the sanple rate to 8KHz or s.th.?
>
> I think perhaps you are getting confused between the sample rate of
> the McBSP and the sample rate of the codec. On the C6711 DSK the Codec
> is fed by a 4.096MHz clock. According to
> http://focus.ti.com/lit/ds/symlink/tlc320ad535.pdf (section 3.1) the
> codec's sampling rate is XX_MCLK/512, which works out at 8khz.
>
> As far as I remember, in the audio example the McBSP is driven by the
> interrupt from the Codec, so it isn't essential for the McBSP to be
> set to sample at a very low rate.
>
> Is this of any help?
>
> Best Regards
> John McCabe
>
> To reply by email replace 'nospam' with 'assen'


Yes this was of some help!! The audio example is indeed interrupt driven,
but what I'm still not sure about is, isn't it possible to change the
sample rate of the codec, or is it unchangeable fixed because of this
crystal on the board?

thanks & regards Hendrik Greving

On Fri, 19 Dec 2003 20:19:11 +0100, Hendrik Greving <[email protected]>
wrote:

>Yes this was of some help!! The audio example is indeed interrupt driven,
>but what I'm still not sure about is, isn't it possible to change the
>sample rate of the codec, or is it unchangeable fixed because of this
>crystal on the board?

As far as I can tell the sample rate of the codec is fixed by that
crystal. I haven't seen anything in the AD535 datasheet to suggest
otherwise.


Best Regards
John McCabe

To reply by email replace 'nospam' with 'assen'