FPGA Central

Hello NG!

I'm working with TMS320F2812 ezDSP board; system clock set t
(7.3728*5)MHz.

I want to use the ADC converter at as high as possible frequency! and so
set its registers like below, you can see some parts of my code:



interrupt void adc_isr(void);

#define ADC_HISPCP 0x1 //HISPCP.0-2=HSPCLK
#define ADC_CPS 0x0 //ADC_CTRL1.7=CPS
#define ADC_CLKPS 0x0 //ADC_CTRL3.1-4=ADCCLKPS
#define ADC_ACQPS 0x0 //ADC_CTRL1.8-11=ACQPS
#define NUM_A_D_CHANNELS 16
#define BufferSize 250

// Global variables used in this example:
Uint16 ch,i,bindex;
Uint16 buf[NUM_A_D_CHANNELS][BufferSize];



main()
{

// Configure ADC
AdcRegs.ADCTRL3.bit.ADCCLKPS = ADC_CLKPS;
AdcRegs.ADCTRL1.bit.ACQ_PS = ADC_ACQPS;
AdcRegs.ADCTRL1.bit.CPS = ADC_CPS;

AdcRegs.ADCTRL1.bit.SEQ_CASC = 1; // dual/cascaded
AdcRegs.ADCTRL1.bit.CONT_RUN = 0; // start-stop/continous
AdcRegs.ADCTRL1.bit.SEQ_OVRD = 0; // normal/override
AdcRegs.ADCTRL3.bit.SMODE_SEL= 0; // sequentional/simultanous

// convert and store in 16 results registers
AdcRegs.ADCMAXCONV.bit.MAX_CONV1 = 0x0F;

AdcRegs.ADCCHSELSEQ1.all = 0x3210;
AdcRegs.ADCCHSELSEQ2.all = 0x7654;
AdcRegs.ADCCHSELSEQ3.all = 0xBA98;
AdcRegs.ADCCHSELSEQ4.all = 0xFEDC;


// Enable ADCINT in PIE
EnableInterrupts();

PieCtrlRegs.PIEIER1.bit.INTx6 = 1;
IER |= M_INT1; // Enable CPU Interrupt 1
EINT; // Enable Global interrupt INTM

// interrupt mode1/mode2
AdcRegs.ADCTRL2.bit.INT_MOD_SEQ1= 0;

// Start SEQ1
AdcRegs.ADCTRL2.bit.SOC_SEQ1=1;

// Enable SEQ1 interrupt (every EOS)
AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 1;


}


interrupt void adc_isr(void)
{

GpioDataRegs.GPETOGGLE.bit.GPIOE0 = 1;

buf[0][bindex]=( (AdcRegs.ADCRESULT0)>>4 );
buf[1][bindex]=( (AdcRegs.ADCRESULT1)>>4 );
buf[2][bindex]=( (AdcRegs.ADCRESULT2)>>4 );
buf[3][bindex]=( (AdcRegs.ADCRESULT3)>>4 );
buf[4][bindex]=( (AdcRegs.ADCRESULT4)>>4 );
buf[5][bindex]=( (AdcRegs.ADCRESULT5)>>4 );
buf[6][bindex]=( (AdcRegs.ADCRESULT6)>>4 );
buf[7][bindex]=( (AdcRegs.ADCRESULT7)>>4 );
buf[8][bindex]=( (AdcRegs.ADCRESULT8)>>4 );
buf[9][bindex]=( (AdcRegs.ADCRESULT9)>>4 );
buf[10][bindex]=( (AdcRegs.ADCRESULT10)>>4 );
buf[11][bindex]=( (AdcRegs.ADCRESULT11)>>4 );
buf[12][bindex]=( (AdcRegs.ADCRESULT12)>>4 );
buf[13][bindex]=( (AdcRegs.ADCRESULT13)>>4 );
buf[14][bindex]=( (AdcRegs.ADCRESULT14)>>4 );
buf[15][bindex]=( (AdcRegs.ADCRESULT15)>>4 );

if(bindex == BufferSize-1) bindex=0;
else bindex++;

// Reinitialize for next ADC sequence
AdcRegs.ADCTRL2.bit.RST_SEQ1 = 1;
AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1;
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;


// Start SEQ1
AdcRegs.ADCTRL2.bit.SOC_SEQ1=1;


return;
}


then I have some questions:

1. why should I clear adc interrupt flag in interrupt subroutine?
"AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1; ",

really, my question is: if I clear the flag in interrupt subroutine, ho
can I understand that all conversions completed correctly? as I realized
this flag will set to "1" after soc (here a software soc), so it mus
clear automatically after all channels converted correctly, isn't it?


2. if I want to use software trigger, in non-continous mode, should
start SEQ1 in the last line of interrupt subroutine each time? "I checke
that without this line it doesn't start again".

// Start SEQ1
AdcRegs.ADCTRL2.bit.SOC_SEQ1=1;



any offers will be appreciated,
Parissa